Denon AVR-890 - Audio;Video Adjust: Specific Parameter Settings; AFDM and Surround Back Channel Settings

50
AVR-2310CI/2310/890, AVC-2310
76 P12/RXD6 DSP MISO I - - - Eu Z - - Z DSP (ADSP-21367-333) control
77 P11/CLK6 DSPICLK O C - - Eu Z O/L O/L Z DSP (ADSP-21367-333) control
78 P10 Z1VSIG.DET I - Lv - Eu Z - - Z Video signal (CVBS) detect
79 P07 PLD WRITE O C - - - Z O/L O/L Z PLD(EPM240T100C5N) firmware update control
80 P06 VPLD CE O C - - Ed Z O/L MODE1=O/H
MODE2=O/L
FPGA control
81 P05 HPD3 O C - - - Z O/L - Z HDMI control (hot plug detect)
82 P04 HPD4 O C - - - Z O/L - Z HDMI control (hot plug detect)
83 P03 (DIR INT) I - Lv - Eu Z - - Z DIR(LC89058W-VF4A) control
84 P02 NC O C - - - Z Z - Z
85 P01 NC O C - - - Z Z - Z
86 P00 DIR RST1 O C - - - Z O/L O/L O/L DIR(LC89058W-VF4A) control
87 P107/(AN7) DSP RST O C - - - Z O/L O/L Z DSP(ADSP-21367-333) reset signal output
88 P106/(AN6) HPD5 O C - - - Z O/L O/L Z HDMI control (hot plug detect)
89 P105/(AN5) DSP ROMRST O C - - Ed Z O/L O/L Z DSP rom reset signal output
90 P104/(AN4) COMPS DET I - Lv - Eu Z - - Z Video signal (COMPONENT) detect
91 P103/(AN3) DSP FLAG0 I - Lv - Ed Z - - Z DSP(ADSP-21367-333) reset signal output
92 P102/(AN2) DSPICS O C - Eu Z O/L O/L Z DSP(ADSP-21367-333) reset signal output
93 P101/(AN1) (DSP FLAG1) I - Lv - Ed Z - - Z DSP(ADSP-21367-333) reset signal output
94 AVSS AVSS - - - - - - - - - AD GND
95 P100/(AN0) VPLD CLK O C - - - Z O/L O/L Z FPGA control
96 VREF VREF - - - - - - - - - AD reference level (+3.3V)
97 AVCC AVCC - - - - - - - - - AD +3.3V
98 P97/(SIN4) NC O C - - Eu Z O/L O/L Z
99 P96/(SOUT4) NC O C - - Eu Z O/L O/L Z
100 P95/(CLK4) VEXP DIN O C - - - Z O/L O/L Z Extended i/o components (BU4094BCFV) control
Pin
No.
PIN PIN NAME I/O Type Det
Op
(in)
Op(ex) Res
PURE
D
CEC STBY
P. O F
F
Function