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Denon DCD-3520 - CXD1125 Q Terminal Function Table (Part 1)

Denon DCD-3520
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CXD11250
Terminal
Function
Terminal!
Symbol
Terminal
Function
oO
Output
to
shift
time
constant
of
Output
filter
for
spindle
Motor.
2
|
MON
;
oO
,
ON/OFF
controi
Output
for
spindle
motor.
3
|
MDP
i
@)
Drive
output
for
spindle
motor.
Rough
contro!
at
CLV-S
mode
and
phase
control
at
CLV-P
Mode,
4
;
MOS
|
0
Drive
output
for
spindle
motor.
Speed
control
at
CLV-P
mode.
5
T
EFM
T
{
Input
of
EFM
signal
from
RF
amplifier.
6
Easy
a
oO
a
Output
to
control
slice
level
of
EFM
signal.
7
Tape
ie)
Sampling
GFS
signal
by
WFCK/16
and
if
itis
“H",
delivers
“HS
if
itis
continuously
“L”
g
times,
delivers
“ue
8
|
Vcoo
|
oO
Vvco
Output.
When
EFM
signal
is
locked,
f=8.6436
MHz.
9
|vcor
>
|
VCO
input.
+
+
+
10
TEST
|
I
*
(OV).
11
a:
PDO
cf
fe)
"Phase
comparing
Output
for
EFM
signal
and
Vvco/2.
12
[vs
=
__GND
(ov).
i
L
|
!nput
of
seria!
data
from
CPU.
16
XRST
|
t
H
System
reset
input.
esets
at
ie
ee
17
CNIN
]
!
r
Input
of
tracking
pulse.
18
SENS
i
(@)
T
Answer
to
address,
output
internal
condition,
19
MUTG
I
4
Input
of
muting.
When
internal
register
A’s
ATTM
is
in
“Ll
and
MUTG
is
in
“L”
for
normal
condition;
“AN
+
for
no
sound
condition.
Output
of
CRC
check
result
of
sub-code
Q.
|
Clock
input
for
serial
output
of
sub-code,
'
Serial
output
of
sub-code.
|
Q
output
of
sub-code.
Output
of
sub-code
sync.
SO
+
$1,
Reading
clock
of
sub-code
Q,
|
Selection
input
of
SQCK.,
Digital
out
output.
(When
CXD11300
or
DO
is
OFF,
output
WECK.)
Output
of
indication
for
frame
sync
lock
condition,
1/0
ii
Data
terminal
of
external
RAM.
DATA8
(uss).
oO
|
Data
terminal
of
external
RAM.
DATA?7.
1/0
+
Apaes
terminal
of
external
RAM.
DATA.
4
1/0
Data
terminal
of
external
RAM.
DATAS.
_
Power
supply
(+5V),
+
1/0
Data
terminal
of
external
RAM.
DATAG.
oy:
5
35
{
DBO3
1/0
Data
terminal
of
external
RAM.
DATA3,
2
+
{
DBO2
|
1/0
Data
terminal
of
external
RAM.
DATAQ.
+
37
D801
i
1/0
Data
terminal
of
external
RAM.
DATA1
(LSB).
2
i
38
RAO1
Address
output
of
external
RAM,
ADDROQ1
(LSB).
+
Address
output
of
external
RAM.
ADDRO2.
i
Address
output
of
external
RAM.
ADDRO3.
|
Address
output
of
external
RAM.
ADDRO4.
Address
output
of
external
RAM.
ADDROS.
Address
output
of
external
RAM.
ADDRO6.
|
Address
output
of
external
RAM.
ADDRO7.
ADDROS8.
+o
=
=
SCID!O!lojofololo
Address
output
of
external
RAM.
TTT
ae
em
me

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