EasyManua.ls Logo

DVC DigitEyes Series - Asynchronous Reset and Genlock; Standard Mode; Asynchronous Reset Mode

Default Icon
66 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
17
5.5 Asynchronous Reset and Genlock
5.5.1 Standard Mode:
The standard mode of operation results from an internally generated clock which is derived from
an internal crystal oscillator. The frame rate of 30 Hz is independent of any external event.
In some applications, it is necessary to synchronize the camera to external events. Two methods
are available:
1. Asynchronous Reset: Synchronizes the camera to an external asynchronous reset pulse
2. Genlock: Synchronizes the camera to an external source of Composite Sync OR Video
5.5.2 Asynchronous Reset Mode:
The camera operates in the standard mode as long as the RESET (DB-37 connector, pin 17) is
High. Due to an internal pull-up resistor, this is the default mode.
A falling edge of the RESET input signal initiates the ASYNCHRONOUS RESET sequence. An
internal circuit detects the falling edge (the duration of the RESET pulse is not significant) and
resets the Vertical Counter (to the top of the ODD field) in the Camera. A frame transfer and
normal readout of the interrupted field ensue and a new integration on the CCD commences. If
no further RESETS occur, normal operation is resumed. It is the responsibility of the application
to ensure that the RESET is synchronized properly with the event that is to be viewed.
INT (N-2) INT (N-1) INT (N) INT (N+1) INT (N+2)
1/60 sec Interrupted 1/60 sec 1/60 sec 1/60 sec
Readout (N-3) Readout (N-2)
Readout (N-1) ODD
Reduced Amplitude
Readout (N) EVEN Readout (N+1) ODD
Video
Sync
External Event
Image of Event
Asynchronous Reset (Single)
RESET
INT (N-1) INT (N)
1/60 sec Interrupted
Readout (N-3) Readout (N-1)
Readout (N) ODD
Reduced Amplitude
Video
Sync
Asynchronous Reset (Multiple)
RESET
INT (N+1) INT (N+2)
Interrupted Interrupted
Readout (N+1) ODD
Reduced Amplitude
Readout (N+2) ODD
Reduced Amplitude
INT (N+3) INT (N+4)
1/60 sec 1/60 sec
Readout (N+3) EVEN
Figure 5-5: Asynchronous Reset Mode Timing Diagram

Table of Contents