Epson PX-8 - Page 52

REV.-A
SWRS~
Switching pulse :
(4545 Hz) :
Q7 collector G
INHRS
100 msec L...- ________ ...J
+8 ----",
-8~- ......
Fig. 2-23 RS-232C Power Regulator Circuit Operation Timing Diagram
The INHRS signal controls the pull-up operation (-8V) for the TXD line. It prevents irregular out-
put voltages from reaching the TXD line. After power is turned on, if the SWRS signal has been
activated,
the INHRS signal is maintained low for approximately 100 ms, preventing the TXD
signal line from being pulled up to unstable voltages. After power is turned off, the INHRS sig-
nal is again maintained low for approximately 100 ms in order to prevent a pull-up to unstable
voltages .
•
Voltage Stabilizer Circuit
The
switching of transistor 031 is controlled by a feedback from the -8V output of this DC-DC
converter to the switching circuit to generate a constant output voltage.
When the -8V line voltage is lower, no potential difference is generated across the base
(ground) and
emitter of the transistor 021; it is maintained in the off state because the zener
diode ZD2 does not break down, and the switching circuit is not affected. When voltage rises
to 7V or above, however, ZD2 breaks down at its zener voltage, generating a potential differ-
ence across the base and eimitter of 021, turning it on. In this state, the collector is held at a
negative level regardless
of the switching pulse. Transistor 031 is cut off and stops switching,
lowering the output potential. This causes the breakdown of ZD2 and allows the switching to
be resumed. The sequence of these circuit operations is repeated to provide two stable voltage
levels of ± 8V.
The RS-232C
power regulator switching signal is shown in Fig. 2-24.
(1) Top: Original clock signal - Measured at IC
14D, pin 11.
(2)
Bottom: Input to RS - Measured at IC 14D,
5V
pin 7.
G ___ D ___ ~D _______ D _______ [
5V
Fig. 2-24
2-28