14. How to use
Figure 18 Basic (32.768 kHz oscillation, counter, FOUT) Function
14.1. Clock Calendar Function
At the time of a communication start, the Clock & Calendar data are fixed (hold the carry operation), and it is automatically revised
at the end of the communication. Therefore, it is recommended that the access to a clock calendar has continuous access by the
auto increment function.
At the moment of current time reading, STOP bit should be “0”.
Table 13 Time, calendar setting example
Example ’88 February 29 (Sun) 17:39:45 (leap year)
Note With caution that writing non-existent time data may interfere with normal operation of the clock counter
Note Time starts at the moment of STOP bit operation (H →L timing)
14.1.1. Clock Counter
1) [SEC], [MIN] register
These registers are 60-base BCD counters. When update signals were generated from a lower counter, a upper counter is one
incremented.. At the timing when the lower register changes from 59 to 00, carry is generated to the higher register and thus
incremented.
When writing is performed to [SEC] register, Internal-count-down-chain less than one second (512 Hz 1 Hz) is cleared to 0.
2) [HOUR] register
This register is a 24-base BCD counter (24-hour format). These registers are incremented at the timing when carry is generated
from a lower register.
3) Leap second adjustment
For leap second adjustment, user can write “60” into SEC counter, after 1 second SEC counter is to be set “00”.
Normally second counter counts up “59” to “00”.
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