Epson RX8111CE User Manual

RX8111CE
Page − 44
ETM61E-01
Figure 33 Operation of OVW, pointer
14.8.4. Time stamp function triggered by I
2
C access
An I
2
C access can trigger time stamp too.
1) COMTG bit
This register control Time stamp trigger by I
2
C access ON/OFF.
Table 58 COMTG bit (Command Trigger)
COMTG
Data
Description
Write
0
Time stamp trigger by I
2
C-Bus OFF
1
Time stamp trigger by I
2
C-Bus ON
RTC timer counter and internal status data are recorded into 20h~29h by I
2
C
reading access from 2Fh. The read data of 2Fh is 00h.
Also, multi access is available.
2) Time stamp access timing
Time stamp processing is done at ACK operation just after slave address sending (of command trigger reading).
R
0
1
0
/INTpin
SDA(Master）
SCL
Time stamp trigger
0
SDA(Slave）
ACK
Trigger
Register data
Time stamp data
New Time stamp data
Slave address+ Read bit
Command Trigger data
Figure 34 Time stamp timing by I
2
C access.

Epson RX8111CE Specifications

General

Brand	Epson
Model	RX8111CE
Category	Control Unit
Language	English