Epson RX8111CE User Manual

RX8111CE
Page − 34
ETM61E-01
14.5. RTC self monitoring Detection
These bits are flag bit of each of functions of RTC.
It is a flag bit that detects the state of this product and holds the result.
- POR Power ON Reset detection
- VLF Detects Internal Voltage Low.
- XST Oscillation stop detection.
- EVIN Event input status.
- VCMP Battery Charge status.
- VLOW bit Battery Low.
14.5.1. Related registers for RTC internal status detection
Table 35 RTC Internal status detection registers
Address
Function
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
1Eh
Flag Register
POR
z
UF
TF
AF
EVF
VLF
XST
33h
Status Monitor
z
EVIN
z
z
VCMP
z
VLOW
z
1) POR bit (Power On Reset)
This bit records power on reset operation.
Table 36 POR bit (Power On Reset)
POR
Data
Description
Write
0
The POR bit is cleared to 0 and waiting for the next power on reset detection
1
Invalid (writing “1” will be ignored)
Read
0
No power on reset detection
1
Power on reset is detected. The result remains until clearing “0”.
All registers are set into default condition by power on rest.
2) VLF bit (Voltage Low Flag)
This bit is reflected with status of POR or XST.
Table 37 VLF bit (Voltage Low Flag)
VLF
Data
Description
Write
0
The VLF is cleared to 0 and waiting for next low voltage detection.
1
Invalid (writing “1” will be ignored)
Read
0
Oscillation status is normal, RTC register data are valid.
1
Either power on reset or X’tal oscillation stop is detected. The result remains
until clearing “0”. User can check the RTC status and initialize by software.(At
power on timing etc.)
3) XST bit (X’tal Oscillation Stop )
This bit records RTC internal crystal oscillation stop status.
Time stamp function is not active if there is no oscillation; it will be active once oscillation begins
when oscillation stopped longer than 10 ms, XST is set to 1. This bit is not cleared to “0” by power on reset.
Table 38 XST bit (X’tal Oscillation Stop)
XST
Data
Description
Write
0
The XST is cleared to 0 and waiting for next oscillation stop detection.
1
Invalid (writing “1” will be ignored)
Read
0
No RTC internal crystal oscillation stop detection
1
RTC internal crystal oscillation stop is detected. The result remains until
clearing “0”.
4) EVIN bit (Input level monitor of EVIN terminal)
This bit monitored EVIN terminal input voltage High / Low.
Table 39 EVIN bit (EVIN Level)
EVIN
Data
Description
Read
0
EVIN terminal input voltage Low level
1
EVIN terminal input voltage High level

Epson RX8111CE Specifications

General

Brand	Epson
Model	RX8111CE
Category	Control Unit
Language	English