Chapter 3. Schematic Checklist
For VDD3P3, when ESP32-S3 is transmitting signals, there may be a sudden increase in the current draw, causing
power rail collapse. Therefore, it is highly recommended to add a 10 μF capacitor to the power rail, which can work
in conjunction with the 1 μF capacitor(s).
It is suggested to add an extra 10 μF capacitor at the power entrance. If the power entrance is close to VDD3P3, then
two 10 μF capacitors can be merged into one.
Add a LC circuit on the VDD3P3 power rail to suppress high-frequency harmonics. The inductor’s rated current is
preferably 500 mA and above.
Place appropriate decoupling capacitors near the other analog power pins according to Figure ESP32-S3 Schematic
for Analog Power Supply Pins.
Fig. 4: ESP32-S3 Schematic for Analog Power Supply Pins
3.1.3 RTC Power Supply
ESP32-S3’s VDD3P3_RTC pin is the RTC and analog power pin. It is recommended to place a 0.1 μF decoupling
capacitor near this power pin in the circuit.
Note that this power supply cannot be used as a single backup power supply.
The schematic for the RTC power supply pin is shown in Figure ESP32-S3 Schematic for RTC Power Supply Pin.
3.2 Chip Power-up and Reset Timing
ESP32-S3’s CHIP_PU pin can enable the chip when it is high and reset the chip when it is low.
When ESP32-S3 uses a 3.3 V system power supply, the power rails need some time to stabilize before CHIP_PU
is pulled up and the chip is enabled. Therefore, CHIP_PU needs to be asserted high after the 3.3 V rails have been
brought up.
To reset the chip, keep the reset voltage V
IL_nRST
in the range of (–0.3 ~ 0.25 × VDD) V. To avoid reboots caused
by external interferences, make the CHIP_PU trace as short as possible.
Figure ESP32-S3 Power-up and Reset Timing shows the power-up and reset timing of ESP32-S3.
Table Description of Timing Parameters for Power-up and Reset provides the specic timing requirements.
Espressif Systems 11
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