Espressif Systems ESP32-S3 - Off-Package Flash and PSRAM; Clock Source; External Crystal Clock Source (Compulsory)

Chapter 3. Schematic Checklist
Table 4: Pin-to-Pin Mapping Between Chip and In-Package Quad SPI
PSRAM
ESP32-S3R2/ESP32-S3FH4R2 In-Package PSRAM (2 MB, Quad SPI)
SPICLK CLK
SPICS1 CE#
SPID SI/SIO0
SPIQ SO/SIO1
SPIWP SIO2
SPIHD SIO3
Table 5: Pin-to-Pin Mapping Between Chip and In-Package Octal SPI
PSRAM
ESP32-S3R8/ESP32-S3R8V In-Package PSRAM (8 MB, Octal SPI)
SPICLK CLK
SPICS1 CE#
SPID DQ0
SPIQ DQ1
SPIWP DQ2
SPIHD DQ3
GPIO33 DQ4
GPIO34 DQ5
GPIO35 DQ6
GPIO36 DQ7
GPIO37 DQS/DM
3.3.2 O-Package Flash and PSRAM
ESP32-S3 supports up to 1 GB o󰝗-package 󰝙ash and 1 GB o󰝗-package RAM. If VDD_SPI is used to supply power,
make sure to select the appropriate o󰝗-package 󰝙ash and RAM according to the power voltage on VDD_SPI (1.8
V/3.3 V). It is recommended to add a zero-ohm series resistor on the SPI communication lines to lower the driving
current, reduce interference to RF, adjust timing, and better shield from interference.
3.4 Clock Source
ESP32-S3 supports two external clock sources:
• External crystal clock source (Compulsory)
• RTC clock source (Optional)
3.4.1 External Crystal Clock Source (Compulsory)
The ESP32-S3 󰝘rmware only supports 40 MHz crystal.
The circuit for the crystal is shown in Figure ESP32-S3 Schematic for External Crystal. Note that the accuracy of the
selected crystal should be within ±10 ppm.
Please add a series component (resistor or inductor) on the XTAL_P clock trace. Initially, it is suggested to use an
inductor of 24 nH to reduce the impact of high-frequency crystal harmonics on RF performance, and the value should
be adjusted after an overall test.
The initial values of external capacitors C1 and C4 can be determined according to the formula:
C
L
=
C1 × C4
C1 + C4
+ C
stray
Espressif Systems 14
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