Fluke 5700A Series II - Page 9

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List of Figures
Figure Title Page
1-1. Time and Costs: Calibrator Calibration.................................................................. 1-10
2-1. Digital Section Block Diagram .............................................................................. 2-4
2-2. Analog Section Block Diagram, Part ..................................................................... 2-7
2-3. Analog Section Block Diagram, Part ..................................................................... 2-8
3-1. 732B External Calibration Connections................................................................. 3-7
3-2. 742A-1 and 742A-10k External Calibration Connections ..................................... 3-10
3-3. 220V DC Range Calibration Connections ............................................................. 3-15
3-4. Wideband Module Calibration Connection............................................................ 3-17
3-5. Overview of Verification Tests .............................................................................. 3-20
3-6. 1 Ohm and 10 Ohm Resistor Verification.............................................................. 3-24
3-7. Direct Current Accuracy Test Setup ...................................................................... 3-28
3-8. 1 MHz Low Pass Filter........................................................................................... 3-29
3-9. AC Voltage Test Setup........................................................................................... 3-30
3-10. Alternating Current Test Setup .............................................................................. 3-33
3-11. Alternating Current Test Setup2 mA and 200 μA.................................................. 3-34
3-12. Metal Film Resistor Equivalent Circuit.................................................................. 3-35
3-13. Metal Film Resistor in Test Circuit........................................................................ 3-35
3-14. Wideband Accuracy at 1 kHz Test Setup............................................................... 3-37
3-15. Wideband Flatness Test Setup ............................................................................... 3-38
3-16. DC Voltage Linearity Test ..................................................................................... 3-41
3-17. DC Voltage Output Noise Test Setup .................................................................... 3-42
3-18. Determining Other Test Limits .............................................................................. 3-47
4-1. Accessing the Fuse................................................................................................. 4-3
4-2. Air Filter................................................................................................................. 4-4
4-3. Rear Panel Removal............................................................................................... 4-5
4-4. Rear Panel Assembly Access ................................................................................. 4-6
4-5. Front Panel Removal.............................................................................................. 4-7
4-6. Analog and Digital Assemblies.............................................................................. 4-9
5-1. Front Panel Final Assembly ................................................................................... 5-5
5-2. Chassis Final Assembly ......................................................................................... 5-7
5-3. Rear Panel Final Assembly ................................................................................... 5-10