Fujitsu EVB JADE-­D - Page 18

Preliminary
18(45)
Prepared Document Number
Manfred Ortmann
Approved Checked Date Revision Storage
2009-10-05 PA 4.2 Mycable01
Pin Signal Function
59 CAN_TX0 CAN Transmission 0
60
DISP_N_R_2 RSDS Output 2n, in TTL Mode
Default=DOUTR0_5
61 CAN_RX0 CAN Reception 0
62
DISP_P_R_3 RSDS Output 3p, in TTL Mode
Default=DOUTR0_6
63
DISP_P_R_11 RSDS Output 11p, in TTL Mode
Default=DOUTB0_6
64
DISP_N_R_3 RSDS Output 3n, in TTL Mode
Default=DOUTR0_7
65
DISP_N_R_11 RSDS Output 11n, in TTL Mode
Default=DOUTB0_7
66 CAN_RX1 CAN Reception 1
67 TSG_R_12 TCON Timing Signal 12
68 CAN_TX1 CAN Transmission 1
69 VIN1_9 Video Capture Data Input 1 bit 6
70
DISP_P_R_5 RSDS Output 5p, in TTL Mode
Default=DOUTG0_2
71 I2S_WS
72
DISP_N_R_5 RSDS Output 5n, in TTL Mode
Default=DOUTG0_3
73 VIN1_3 Video Capture Data Input 1 bit 3
74
DISP_P_R_6 RSDS Output 6p, in TTL Mode
Default=DOUTG0_4
75 VIN1_0 Video Capture Data Input 1 bit 0
76
DISP_N_R_6 RSDS Output 6n, in TTL Mode
Default=DOUTG0_5
77 VIN1_10 Video Capture 1 Vertical Syncronisation
78
DISP_P_R_4 RSDS Output 4p, in TTL Mode
Default=DOUTG0_0
79 I2S_SDI Serial Data Input
80
DISP_N_R_4 RSDS Output 4n, in TTL Mode
Default=DOUTG0_1
81 VIN1_4 Video Capture Data Input 1 bit 4
82 PWMO0 PWM Output
83 VIN1_1 Video Capture Data Input 1 bit 1
84 I2S_ECLK I2S Clock Input (
85 VIN1_7 Video Capture Data Input 1 bit 7
86 PWMO1 PWM Output