Fujitsu EVB JADE-­D - Page 23

Preliminary
23(45)
Prepared Document Number
Manfred Ortmann
Approved Checked Date Revision Storage
2009-10-05 PA 4.2 Mycable01
Pin Signal Function
34 CPU_D9 Data
35 MEM_XWR1 Write Strobe
36 CPU_D10 Data
37 MEM_XRD Read Strobe
38 CPU_D13 Data
39 MEM_CS2 Chip Select 2
40 CPU_A2 Address
41 MEM_CS0 Chip Select 0
42 CPU_A6 Address
43 CPU_A22 Address
44 CPU_A5 Address
45 CPU_A21 Address
46 CPU_A10 Address
47 MEM_XWR0 Write Strobe
48 CPU_A9 Address
49 CPU_A24 Address
50 CPU_A14 Address
51 MEM_RDY Ready input for slow device
52 CPU_A13 Address
53 JADE_VO0_23 Digital RGB output 0 Data B7
54 CPU_A18 Address
55 JADE_VO0_22 Digital RGB output 0 Data B6
56 CPU_A17 Address
57 JADE_VO0_18 Digital RGB output 0 Data B2
58 JADE_IO_G4_28 IDE_DD_3 / GPIO_PD_15
59 JADE_VO0_19 Digital RGB output 0 Data B3
60 JADE_IO_G4_29 IDE_DD_2 / GPIO_PD_14
61 JADE_VO0_14 Digital RGB output 0 Data G4
62 JADE_IO_G4_30 IDE_DD_1 / GPIO_PD_13
63 JADE_VO0_15 Digital RGB output 0 Data G5
64 JADE_IO_G4_31 IDE_DD_0 / ---
65 VIN0_7 Video Capture Data
66 JADE_IO_G1_0 DCLKIN1
67 VIN0_4 Video Capture Data
68 JADE_VO0_21 Digital RGB output 0 Data B5
69 VIN0_3 Video Capture Data