Preliminary
24(45)
Prepared Document Number
Manfred Ortmann
Approved Checked Date Revision Storage
2009-10-05 PA 4.2 Mycable01
Pin Signal Function
70 JADE_VO0_13 Digital RGB output 0 Data G3
71 VIN0_5 Video Capture Data
72 JADE_VO0_20 Digital RGB output 0 Data B4
73 VIN0_6 Video Capture Data
74 JADE_VO0_17 Digital RGB output 0 Data G7
75 VIN0_1 Video Capture Data
76 JADE_VO0_12 Digital RGB output 0 Data G2
77 VIN0_2 Video Capture Data
78 JADE_VO0_8 Digital RGB output 0 Data R4
79 CCLK0 Video Capture Input Clock
80 JADE_VO0_16 Digital RGB output 0 Data G6
81 VIN0_0 Video Capture Data
82 DCLKO0 Video output interface dot clock output
83 DCLKIN0 Video output interface dot clock input
84 JADE_VO0_9 Digital RGB output 0 Data R5
85 JADE_VO0_6 Digital RGB output 0 Data R2
86 DE0 DE / CSYNC
87 JADE_VO0_7 Digital RGB output 0 Data R3
88
HSYNC0 Video output interface horizontal sync output
Horizontal sync input in external sync mode
89 JADE_VO0_10 Digital RGB output 0 Data R6
90 GV0 Video output interface graphics / video switch
91 JADE_VO0_11 Digital RGB output 0 Data R7
92
VSYNC0 Video output interface vertical sync output.
Vertical sync input in external sync mode
93 JADE_IO_G1_22 DOUTB1_3 / MEM_XWR_3 / DOUTB0_1
94 JADE_IO_G1_20 DOUTB1_5 / MEM_ED_17 / DOUTG0_1
95 JADE_IO_G1_21 DOUTB1_4 / MEM_ED_16 / DOUTG0_0
96 JADE_IO_G1_23 DOUTB1_2 / MEM_XWR_2 / DOUTB0_0
97 JADE_IO_G1_18 DOUTB1_7 / MEM_ED_19 / DOUTR0_1
98 JADE_IO_G1_16 DOUTG1_3 / MEM_ED_21 / GPIO_PD_7
99 JADE_IO_G1_17 DOUTG1_2 / MEM_ED_20 / GPIO_PD_6
100 JADE_IO_G1_19 DOUTB1_6 / MEM_ED_18 / DOUTR0_0
101 JADE_IO_G1_14 DOUTG1_5 / MEM_ED_23 / GPIO_PD_9
102 JADE_IO_G1_12 DOUTG1_7 / MEM_ED_25 / GPIO_PD_11
103 JADE_IO_G1_13 DOUTG1_6 / MEM_ED_24 / GPIO_PD_10
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