Fujitsu EVB JADE-­D - Page 25

Preliminary
25(45)
Prepared Document Number
Manfred Ortmann
Approved Checked Date Revision Storage
2009-10-05 PA 4.2 Mycable01
Pin Signal Function
104 JADE_IO_G1_15 DOUTG1_4 / MEM_ED_22 / GPIO_PD_8
105 JADE_IO_G1_10 DOUTR1_3 / MEM_ED_27 / I2S_SDO0
106 JADE_IO_G1_8 DOUTR1_5 / MEM_ED_29 / I2S_WS0
107 JADE_IO_G1_9 DOUTR1_4 / MEM_ED_28 / I2S_SDI0
108 JADE_IO_G1_11 DOUTR1_2 / MEM_ED_26 / GPIO_PD_12
109 JADE_IO_G1_6 DOUTR1_7 / MEM_ED_31 / I2S_ECLK0
110 JADE_IO_G1_1 DCLKO1
111 JADE_IO_G1_7 DOUTR1_6 / MEM_ED_30 / I2S_SCK0
112 JADE_IO_G1_5 GV1 / DREQ_7 / DREQ_7
113 JADE_IO_G1_4 VSYNC1 / XDACK_6 / XDACK_6
114 USB_PWR_CTRL USB Port Power Control
115 JADE_IO_G1_3 HSYNC1 / DREQ_6 / DREQ_6
116 USB_DP D+ for HS and FS
117 JADE_IO_G1_2 DE1 / XDACK_7 / XDACK_7
118 USB_DM D- for HS and FS
119 GND Ground
120 GND Ground
Tab. 2-3: Pin assignment of connector X301, CPU signals side