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Fujitsu MHX2300BT - Page 163

Fujitsu MHX2300BT
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5.3 Host Commands
Table 5.33 DEVICE CONFIGURATION IDENTIFY data structure (2/2)
Word Value Content
8 X'0015' Serial-ATA command set/function
Reflected in IDENTIFY information ”Word 76 to 79.
Bits 15-5: Reserved
Bit 4: 1 = Software Settings Preservation supported
Bit 3: 1 = Asynchronous Notification supported
Bit 0: 1 = Native command queuing supported
Bit 2: 1 = Interface power management supported
Bit 1: 1 = Non-zero buffer offsets in DMA Setup FIS supported
9 X'0000' Reserved for Serial-ATA
X'0000' Reserved
21 X'2000' Bits 15-14: Reserved
Bit 13: Write uncorrectable is allowed
Bit 12-0: Reserved
22 to 254 X'0000' Reserved
255 X'xxA5' Bits 15-8: Check sum code (This is obtained by calculating the sum of
all upper bytes and lower bytes in WORD 0 to 256 and the
byte consisting of bits 7 to 0 in WORD 255, and then
calculating the two's complement of the lowest byte of that
sum.)
Bits 7-0:
10 to 20
C141-E254 5-89

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