GigaDevice Semiconductor GD32E507Z-EVAL - I2 C; I2 S; Sqpi; Figure 4-8. Schematic Diagram of I2 C

User Guide
GD32E507Z-EVAL
11/43
RS232_TX
VBUS
1
DM
2
DP
3
ID
4
GND
5
Shield
6
USB_MiniAB receptacle
J1
Mini_USB
UD+
1
UD-
2
GND
3
RTS#
4
CTS#
5
TNOW
6
VCC
7
TXD
8
RXD
9
V3
10
U3
CH340E
D+
D-
+3V3
+3V3
PA10
C16
50V/0.01uF
C22
50V/0.1uF
D+
D-
C23
50V/4700pF
R13
1MΩ
USART0 To USB
RS232_RX
USART0_TX
4.9. I2C
Figure 4-9. Schematic diagram of I2C
A0
1
A1
2
A2
3
GND
4
SDA
5
SCL
6
WP
7
VCC
8
U4
AT24C02C-SSHM-T
+3V3
GND
R8
4.7KΩ
R9
4.7KΩ
I2C0_SCL
I2C0_SDA
I2C
C27
50V/0.1uF
GND
PB7
PB6
4.10. I2S
Figure 4-10. Schematic diagram of I2S
I2S
I2S1_MCK
I2S1_WS
I2S1_CK
I2S1_SD
C62
50V/0.1uF
GND
E8
16V/10uF,AVX
C63
50V/0.1uF
GND
E9
16V/10uF,AVX
GND
5
4
3
2
1
J2
HeadPhone
E6
16V/3.3uF,AVX
E7
16V/3.3uF,AVX
GND
R57
10KΩ
R54
10KΩ
GND
GND
R55
470Ω
R56
470Ω
SDIN
1
SCLK
2
LRCK
3
MCLK
4
VQ
5
FILT+
6
AOUTL
7
GND
8
AOUTR
10
VA
9
U10
CS4344
+3V3
PC6
PB12
PB13
PB15
4.11. SQPI
Figure 4-11. Schematic diagram of SQPI