#8 forces a
logic 1 (grd) at the
keydown
data buss (S) and
a logic
(—14V) at
bass select data
buss (R). This
combina-
tion yields a
logic 1 (grd) at the
pin 11
output of
IC13D. The logic
I (grd) at pin
11 is sent
to pin 1 of IC13A
and pin 9 of
IC13C.
IC13C NANDS
the logic 1 (grd)
from
IC13D and the logic
1 (grd) from
the
keydown buss to
produce a logic
(_J4V)
at its output
pin 10. Now with
pin 1
ofIC13A at logic
1 (grd) and pin 6
of IC13B at logic
(—14V) flip-flop
IC13A/13B
produces a logic 1
(grd) at
its pin 4 and
pin
(—
14V) at its pin
3.
The two
outputs of
the flip-flop
combine
with the inputs
of the
16V8'
tab to
ailow the
medium bass G
frequency and
the high bass
G frequen-
cy
to pass
through 1C12A
and 1C12D to
enter the
envelope gates
of IC14B and
IC14C.
IC12D directly
receives the logic
1 (grd)
gating input at
pin 13 from
IC13B.
1C12A receives a logic 1 (grd) at
its
gating input (pin 1)
from
conducting
transistor Q6.
IC12B is
inhibited be-
cause
the logic
(—14V) from
pin
3
of
IC13A overrides the
logic 1 (grd)
from
transistor
05.
(Refer to schematic
of the
Bass
Generator Board).
After
the medium
and high
bass
signals
reach the
envelope NAND
gates
of IC14.
the
signals undergo
the same
process
that was
explained in
example
#1.
EXAMPLE #3- MODE #3
Assuming that
pedal #2 is
depressed
and the
1678'
stop
is set for
8'
the
following
operation occurs:
The note
selection process of
the C#
bass tone
from data
selector IC5 is
accomplished
in exactly the
same
manner as that
described in
example
#1. Likewise,
the C# low,
medium, and
high bass
tones are made
available at
IC12 at its
respective B,
A, and D
selections. But,
with the
1678'
tab set
for the
8'
mode, the
octave select
gates
of IC13,
transistor
Q5,
and
transistor
Q6
enable the
medium and high
bass gates
IC12 and
1C12D and disable
the low
bass gate 1C12B.
Because
both the
keydown data buss
(S) and the bass select data buss (R) are
held to logic 1 (grd) levels with pedal #2
depressed, flip-flop IC13A/13B pro-
vides a logic
(
—14V) at its pin
4
ouput
and a logic 1 (grd) at its
pin
3
output.
Even through transistor Q6 is shut off in
8'
mode, the logic 1 (grd)
output of
IC13A maintains pin 1 of
IC12A at
ground potential.
This enables the
medium bass gate. (Refer to board
schematic).
Transistor
Q5
maintains
cutoff poten-
tial in
8"
mode.
The
transistor's high
collector/ emitter resistance develops a
logic (—14V) level and applies this
level to pin 5 of IC12B. The
logic
(
_14V) at pin 5
disables the low bass
gate.
After the medium and
high bass
signals
leave
the' 1C12,
they enter the
envelope gates
of IC14 and
follow
the
normal path
through the RC mute filter
and
transistor Q10.
EXAMPLE #4
-
MODE #4
Assuming
that
pedal #8 is
depressed
and the
1678'
stop
is set for
8'
the
following
operation occurs:
The G
low, medium and high
bass
tones are
applied to the bass
select
gates of
1C32B, A, and D in the
normal
manner.
Because pedal #8 is
depressed
the
keydown data buss (S)
goes to logic
1 (grd)
and the bass
select data buss
goes to
a logic
(—
14V).
These
levels
force pin
3 of 1C13A to
fall
to
the logic
(—14V) level and pin
4 of IC13B to rise
to
the logic 1 (grd)
level.
Because the
1678'
tab is set
for
8',
the outputs
of the
IC13A/13B flip-flop
combine
with the "floating"
and logic I
(grd)
potentials at J506
pins 2 and 1
respectively and force
pins 5 and 1 of
IC12B and IC12A to
logic (—14V)
levels. This action
allows only the
high
bass
gate of
1C12D to become
active and
pass a
signal
to
the envelope
gates.
EXAMPLE
#5
-MODE #5
Assuming the
bass to
lower
tab
is
set
for the "ON" position and lower
manual key #20 (C) is depressed, the
following action occurs:
With the bass to
lower tab on, ground
is removed from the
pedal assembly and
applied to a
buss bar in the
lower
manual
assembly. This
rearrangement
of
ground disables the
pedals and
enables the first 20
lower manual keys
for
bass
keying.
When the lower
manual keys
1-20
are
depressed in bass mode. J505,
J504 and
J503
receive logic 1 (grd)
keying inputs.
These keying inputs
travel through the
diode matrix
and key the
priority
encoder ICs.
Lower manual key #20,
for
instance, places
a logic 1 (grd) at
the D4
input of
1C1. The note
select process
from this
encoder stage to
the data
selector stage operates in
the same
manner as that of the
pedal mode.
With lower
manual key #20
depressed
the high C
bass frequency at
the X4
input of 1C6 is
released at the Z
output
line.
This frequency
travels through
1C12C
reaches 1C12
pin 12 as the high
bass
signal, and clocks
IC15 to form the
medium and low bass
signals at IC12A
pin
2 and IC12B pin
6.
As in the
pedal modes, 1C12
does not
pass any signals
to the envelope
gates
of 1C14
until the bass
select circuitry
(IC13,
Q5,
and
Q6)
releases
logic 1 (grd)
levels to
the gating inputs
of IC12 pins
5,1, or
13.
Also
with
lower manual key #20
activated, the
keydown data buss
^
rises to
logic 1
(grd) level and the bass
select buss
(R) remains at
logic
(—
14V). This
combination
of inputs at
NAND
gate 1C13D
forces flip-flop
IC13A/13B to
hold a logic
(—14V)
level
at its pin 3
output and a
logic 1
(grd)
level at its
pin 4 output. The
pin 3
output of logic
(—
14V) holds
IC12B in
a
disabled
mode and the
pin 4 output
holds IC12D
operational.
Also,
because the bass
to lower tab is
actuated,
transistor
Q6
receives
—14V
at
its base input.
This potential
turns
Q6
on which
allows pin 1 of
IC12A to
maintain a
logic 1 (grd)
level. Conse-
quently
IC12A passes the
medium bass
signal
gate.
The
result of
holding lower
manual
key #20
down when the
bass to lower
coupler is
on is the
passing of the
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