Harris DA-DHR6802+ - Signal Flow

DA-DHR/DH/DSR/DS/HR/H6802+ Installation and Operation Manual 7
Chapter 1: Introduction
Preliminary—Contents are proprietary and confidential. Do not photocopy or distribute.
Signal Flow
Figure 1-3. Signal Flow Diagram
EQ
EQ
Reclocker
Reclocker
IN 1
EQ_A
EQ_B
RCLK_A
RCLK_B
IN 2
4×4
Driver
Driver
Inverter
1-1
1-2
1-3
1-4
2-1
2-2
2-3
2-4
Inverter
Inverter
Inverter
Streamin
g
bus
DRV_B
DRV_A
Trans-
ceiver
Streaming
sub-board
CTRL
bus
DA coreDC/DC
+3.3 V +6.8 V
CNFG
EQ_A
EQ_B
RCLK_A
RCLK_B
CNFG
DRV_A
DRV_B
Shift register array
I2C
OUT 2
O
UT 1