Hitachi SJ100 Series

9. Image block diagram
(1). IMAGE BLOCK DIAGRAM OF SJ100 INVERTER
MCU
REMORT OPERATOR
ISORATION
DC REACTOR
(OPTION)
N
(
-
)
PD(+1)
P(+)
T(L3)
S(L2)
R(L1)
INVERTER
CONVERTER
＊１
W(T3)
V(T2)
U(T1)
DRIVE CIRCUIT
DETECT V,I
POW ER S UPPLY
MCU
EEPROM
COMMUNICATION
PORT
CORE INVERTER
(ISPM)
SERIAL
COMMUNICATION
HITACHI
USER INTERFACE
I/O BLOCK
(I/O board)
TERMINALS
OPERATION PANEL WITH
POTENTIOMETER
SUB CONDENCER BOARD(HFx)
+
C
B
+
+
RS
(LFU
,
NFE)
Tr BR
RB
BRD resistor(option)
EMC DIRECTIVE COMPLIANT WITH DEDICATED NOISE FILTER(OPTION)
Note; Main circuit capacitor CB; HFE,HFU; serial connection.
; LFU,NFE; single connection.
9-1/E