HP 54540 Series - Page 131

Chapter 8: Theory of Operation
Main Assembly Theory
The auxiliary trigger (rear panel) is compared to a trigger level in a separate circuit and then
multiplexed with the line trigger. The auto trigger is combined with the selected trigger (aux
or line) and fed to the logic trigger.
Time Base The time base provides the sample clocks and timing necessary for data
acquisition. It primarily consists of the 100-MHz reference oscillator, time base hybrid,
and trigger interpolator pulse stretcher.
e The 100-MHz reference oscillator provides the base sample frequency.
e The time base IC has programmable dividers to provide the rest of the sample frequencies
appropriate for the time range selected. The time base uses the time-stretched output of
the interpolator pulse stretcher to time-reference the sampling to the trigger point. The
time base has counters to control how much data is taken after the trigger event
(post-trigger data). After enough pre-trigger samples have occurred, the time base IC
sends a signal to the logic trigger (ARM) indicating it is ready for the trigger event. When
the trigger condition is satisfied, the logic trigger sends a signal back to the time base
(SYSTRIG). The time base IC then starts the post-trigger delay counter. When the
countdown reaches zero, the sample clocks are stopped and the CPU is signaled that the
acquisition is complete.
e The Interpolator Pulse Stretcher is a dual-slope integrator that acts as a time-interval
stretcher. When the logic trigger receives a signal that meets the programmed triggering
requirements (SYSTRIG), it signals the time base. The time base then sends a pulse to the
pulse stretcher. The pulse is equal in width to the time between the trigger (SYSTRIG) and
the next sample clock. The pulse stretcher stretches this time by a factor of approximately
1000. Meanwhile, the time base hybrid runs a counter with a clock derived from the sample
rate oscillator. When the interpolator indicates the stretch is complete, the counter is
stopped. The count represents, with much higher accuracy, the time between the trigger
and the first sample clock. The count is stored and used to place the recently acquired
data in relationship to the trigger point.
AC Cal The AC Cal is a multiplexer circuit that provides several signals to the Probe
Compensation/AC Calibrator outputs. The signal provided depends on the mode of the
instrument. It provides a probe compensation signal, a pulse representing the trigger
event, or signals used for self-calibration. The probe compensation signal is derived from
the real-time clock oscillator and can be set from 250 mHz to approximately 32 kHz. The
AC calis sent through an analog multiplexer to the front panel for probe compensation.
DC Cal The DC Cal output is used for self-calibration. It is one output from a 16-channel
DAC. The DC cal is also sent through an analog multiplexer to the front panel for probe
calibration.
Digital Interface The Digital Interface provides control and interface between the
system control and digital functions in the acquisition circuitry.
Analog Interface The Analog Interface provides analog control of functions in the
acquisition circuitry. It is primarily a 16-channel DAC with an accurate reference and
filtered outputs. The analog interface controls:
e Channel offsets
e Trigger levels
© Two logic trigger functions
® The DC Cal output for instrument and probe calibration