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HP 8753D Option 011 - Test Descriptions and Features

HP 8753D Option 011
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T
est Descriptions
The analyzer
has up
to 80
routines that
test, v
erify,
and adjust
the
instrumen
t.
This
section
describ
es those
tests.
Internal T
ests
This
group of
tests runs
without external
connections or
op
erator
in
teraction.
All
return
a
PASS
or
FAIL
condition.
All
of
these
tests
run
on
p
o
w
er-up
and
PRESET
except
as noted.
0
ALL
INT.
Runs
only
when
selected.
It
consists of
internal
tests 3-11,
13-16, and
20.
Use
the fron
tpanel
knob to
scroll
through
the
tests
and
see
whic
h
failed.
If
all
pass,
the
test
displa
ys
a
P
ASS
status.
Eac
h
test
in the
subset retains
its o
wn test
status.
1
PRESET.
Runs
the
following
subset of
internal
tests:
rst,the
R
OM/RAM
tests
2,
3,
and
4;
then
tests
5
through
11,
14,
15,
and
16.
If
an
y
of
these
tests
fail,
this
test
returns
a
F
AIL
status.
Use
the
fron
t
panel
knob
to scroll
through the
tests and
see
whic
h
failed.
If
all pass,
this test
displa
ys
a
P
ASS
status.
Eac
h
test
in
the
subset
retains its
o
wn
test
status.
This
same
subset
is
a
v
ailable
o
v
er
HP-IB
as
\TST?".
It
is
not
p
erformed
up
on
remote
preset.
2
R
OM.
P
art
of
the
R
OM/RAM
tests
and
cannot
b
e
run
separately
.
Refer
to the
\Digital Con
trol T
roublesho oting"
chapter
for
more
information.
3
CMOS
RAM.
V
eries
the
A9
CPU
CMOS
(long-term) memory
with a
non-destructiv
e
write/read
pattern.
A
destructiv
e
v
ersion
that
writes
o
v
er
stored
data
is sho
wn
in
T
able
10-2
.
4
Main
DRAM.
V
eries
the
A9
CPU
main memory
(DRAM)
with
a
non-destructiv
e
write/read
test
pattern.
A
destructiv
e
v
ersion
is
sho
wn
in
T
able
10-2
.
These tests,
in
ternal
tests
2
through
4,
are
normally
run
at
preset
and
p
o
w
er-on
(see
NORMAL,
b
elo
w).
Ho
w
ever,
ajump
er
on
the
A9
CPU
assem
bly
,
illustrated
in
Figure
10-2
,
can
b
e
set
in
one
of
v
e
p
ositions
with
the
following
results:
T
able
10-2.
Descriptions
of
Jumper
P
ositions
Jump
er
P
osition
P
osition
No
Result
ALTER 1 With the
jump er
in this
righ
t
p
osition,
correction
constan
ts
can
b
e
altered,
(up
dated)
during
adjustmen
t
pro
cedures. The
altered
correction
constan
ts
are
stored
in
EEPR
OM,
replacing
previously
stored correction constants.
CMOS 2 This destructive v
ersion of the CMOS RAM test
(internal test 3)
contin
uously writes o
ver information stored there.
DRAM 3 This
destructive v
ersion of the main DRAM test (internal test 4)
contin
uously writes o
ver information
stored there.
SKIP 4 For
factory use only
.
NORMAL 5 The left p osition is the normal op eration position.
10-6 Service Key Menus and Error Messages DRAFT
3/21/106 15:14
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