TC-508 Service Manual
13
U601
MCU
SRT3210
TX/RX
VCO
Q102
QT_MODE
FILLER
R103
C132
PLL
LOOP FILTER
1
3
2
4
DATA/STB/CK
LD
QT_OUT
CP
BUFFER AMP
Q105
2SC4226
LOCAL OSCILLATOR AMP
Q104
2SC5108
VDD
M
O
D
E
T/R SW
Q103
D105
Crystal
XT 101
38.4MHz
T/R
PLL
U102
MB15E03SL
Figure 2
The PLL circuit generates RF carrier signal for TX and the first local oscillator signal for
RX.
Step frequency of PLL circuit is 6.25 KHz and 5 KHz. In U101, the 38.4MHz reference oscillator
signal is divided into 5 KHz and 6.25 KHz reference frequencies via a fixed counter in PLL. The signal
from VCO (TX/RX VCO) enters the PLL after processed by the buffer amplifier. In the PLL, the signal is
processed by a variable frequency divider. After division, the signal is compared with the reference
frequency in a phase detector (PD) of the PLL. The signal from the PD passes through a low-pass filter
and then is sent to the varactors (D101 and D102) of VCO to control the output frequency. Then the RF
signal is processed by the buffer amplifiers (Q104 and Q406), and controlled by D616 and D617 to only
serve as TX signal or RX first local oscillator signal.
2) VCO
VCO section is realized by the oscillator circuit of three-point capacitance. TX VCO and RX VCO
share the same oscillator circuit. The TX/RX VCO is controlled by Q103.
Note: If the PLL is unlocked, the LD pin of U101 outputs low level. If the microprocessor detects
such situation, TX/RX operation is prohibited, and an alarm sounds.
2.2 RF Power Amplifier Circuit (TX Section)
The block diagram of the RF power amplifier circuit is shown in the figure below:
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