IBM Power 750 - Power 760 System Features

8 IBM Power 750 and 760 Technical Overview and Introduction
򐂰 Eight I/O expansion slots per system
– Six Gen2 PCIe 8x slots plus two GX++ slots
򐂰 PowerVM (optional)
– IBM Micro-Partitioning®
– Virtual I/O Server (VIOS)
– Automated CPU and memory reconfiguration support for dedicated and shared
processor logical partition groups (dynamic LPAR)
– PowerVM Live Partition Migration (requires PowerVM Enterprise Edition)
򐂰 12X I/O drawer with PCIe slots for 16-core or larger Power 750 systems:
– Up to four PCIe I/O drawers (FC 5802 or FC 5877)
򐂰 Disk or SSD-only I/O drawers:
– Up to two EXP30 Ultra SSD I/O drawers (FC EDR1) with integrated, high-performance
SAS controllers
– Up to 51 EXP24S SFF SAS I/O drawers (FC 5887) on SAS PCIe controllers (optionally
one of the 51 drawers can be attached to the external SAS port of the system unit)
– Up to 27 EXP12S 3.5-inch SAS I/O drawers (FC 5886) on SAS PCIe controllers
(supported but not orderable)
1.5.2 Power 760 system features
The following features are available on the Power 760:
򐂰 A 5U 19-inch rack-mount system enclosure
򐂰 One to four 0/12-core CUoD processor DCMs:
– 0/12-core (2 x 6-core) 3.1 GHz processor DCM (FC EPT5)
– 0/12-core (2 x 6-core) 3.4 GHz processor DCM (FC EPT6)
򐂰 POWER7+ DDR3 Memory DIMMs (two per feature):
– 8 GB (2 x 4 GB), 1066 MHz (FC EM08)
– 16 GB (2 x 8 GB), 1066 MHz (FC EM4B)
– 32 GB (2 x 16 GB), 1066 MHz (FC EM4C)
– 64 GB (2 x 32 GB), 1066 MHz (FC EM4D)
򐂰 Active Memory Expansion with POWER7+ hardware accelerator (FC 4792)
򐂰 Six hot-swappable, 2.5-inch, small form-factor SAS disks or SSD bays per system
Additional processor considerations:
򐂰 Each system must have a minimum of one processor DCM (12 cores).
򐂰 There is a maximum of four DCMs per system (48 cores).
򐂰 If you have more than one processor DCM in one server, then all processor DCM
features must be identical: All 3.1 GHz processor DCMs (FC EPT5) or all 3.4 GHz
processor DCMs (FC EPT6).
򐂰 Each system must have a minimum of eight processor activations (FC EPTA or
FC EPTB).
򐂰 All processor DCMs are placed on a mandatory processor and memory backplane
(FC EPT1).