4 - 3
• FREQUENCY SYNTHESIZER CIRCUITS
4-4 VOLTAGE DIAGRAMS
Voltage from the power supply is routed throughout the transceiver, through regulators and switches.
VCC
POWER ON
S4
M5VS
RVS
T5VS
REG
5V
REG
R5
REG
T5
CPU
3.3V
CPU3.3V
CPU
HV
GND
IC220
Q221
Q222
M5V
R5V
RX circuit
COMMON circuit
TX circuit
T5V
Q364
Q365
Q224
Q225
PWR
CTRL
PWR
CTRL
PWSW
PON
Q353
RF UNIT
CHASSIS
MAIN UNIT
Q354
Q354
CPU3.3V
REG
5V
IC384
DC
DC
1.8V
GPS MODULE
NOISE CANSEL IC
1.1V
IC383
Q363
LO
SW
BPF
BUFF
BUFF
BUFF
FIL
LOOP
X1
D50,D51
Q24
Q25
Q21,Q22
IC1
PLL IC
REF.OSC
PLLO
2ND LO
TX AMPs
1st IF mixer
1st LO
D20-D22
4-3
FREQUENCY SYNTHESIZER (MAIN UNIT)
• VCO
The VCO (Q21, Q22, and D20–D22) generates both the 1st
LO signal and the TX signal. The generated signal is ampli-
fi ed by buffers (Q23 and Q24), and then used as the TX or
RX LO signal.
In receive, the LO signal is applied to the 1st IF mixer (Q150),
through the LO SW (D51) and BPF (L26 and C122).
In transmit, the LO signal is applied to the TX AMP circuits,
through the LO SW (D50).
• PLL
A portion of the VCO output signal is passed through two buf-
fers (Q23 and Q25), and then fed back to the PLL IC (IC1, pin
16), through the LPF (L20, C21 and C22).
The PLL IC (IC1) phase compares the outputs of the ref-
erence frequency oscillator (TCXO; X1) and VCO, and the
phase difference is output as the charge pump current.
The current is passed though the loop fi lter (R10, R22, C11,
C13, C18 and C24) to be converted into the lock voltage,
which controls the oscillating frequency of VCO.
When the oscillation frequency drifts, its phase changes from
that of the reference frequency, causing a lock voltage change
to compensate for the drift in the VCO oscillating frequency.
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