Integra DTR-6.5 - Page 65

DTR-6.5
IC BLOCK DIAGRAMS AND DESCRIPTIONS
1A
1Y
2A
2Y
3A
3Y
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Vcc
6A
6Y
5A
5Y
4A
4Y
(TOP VIEW)
A
L
H
Y
L
H
Truth table
TC74HCT7007AF(Hex buffer)
G1
A1
A2
A3
A4
A5
A6
A7
A8
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Vcc
G2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Z
Z
H
L
X :Don't care
Z :High impedance
G1
H
X
L
L
G2
X
H
L
L
An
X
X
H
L
OUTPUT
INPUTS
TC74VHC541FT(Octal bus buffer)
1A
1Y
2A
2Y
3A
3Y
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Vcc
6A
6Y
5A
5Y
4A
4Y
(TOP VIEW)
A
L
H
Y
H
L
Truth table
74HCU04F(Hex Inverters)
w w w . x i a o y u 1 6 3 . c o m
Q Q
3
7
6 3
1 5 1 5
0 9 9
2
8 9
4 2
9 8
T E L 1 3 9 4 2 2 9 6 5 1 3 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3
Q Q
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