IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -86
LOGIC DIAGRAM
PIN CONFIGURATION
Q213, Q214: K4M563233G (256 Mbit SDRAM)
TX-NR905/NA905
Bank Select
Data Input Register
2M x 32
2M x 32
Sense AMP
Output Buffer
I/O Control
Column Decoder
Latency & Burst Length
Programming Register
Address Register
Row Buffer
Refresh Counter
Row Decoder
Col. Buffer
LRAS
LCBR
LCKE
MQDLEWLRBCLSARL
CLK CKE CS RAS CAS WE DQM
LWE
LDQM
DQi
CLK
ADD
RBCWLSACL
2M x 32
2M x 32
Timing Register
<Top View>
521634897
F
E
D
C
B
J
H
G
A
#A1 Ball Origin Indicator
M
L
K
R
P
N
K4M563233G-XXXX
SAMSUNG Week
FBGA Package
w
w
w
.
x
i
a
o
y
u
1
6
3
.
c
o
m
Q
Q
3
7
6
3
1
5
1
5
0
9
9
2
8
9
4
2
9
8
T
E
L
1
3
9
4
2
2
9
6
5
1
3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
http://www.xiaoyu163.com
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