Intel E7500 User Manual

Introduction
R
Intel
®
E7500/E7505 Chipset MCH Thermal Design Guide 9
1.2 Definition of Terms
Term Definition
BGA Ball Grid Array. A package type defined by a resin-fiber substrate, onto which a die is
mounted, bonded and encapsulated in molding compound. The primary electrical
interface is an array of solder balls attached to the substrate opposite the die and
molding compound.
Intel
®
ICH3-S /
Intel
®
ICH4
I/O Controller Hub. The chipset component that contains the primary PCI interface,
LPC interface, USB, ATA-33, and other legacy functions.
MBGA Mini Ball Grid Array. A version of the BGA with a smaller ball pitch.
MCH Memory Controller Hub. The chipset component that contains the processor interface
and the memory interface.
FC-BGA Flip Chip Ball Grid Array. A package type defined by a resin-fiber substrate where a die
is mounted using an underfilled C4 (Controlled Collapse Chipset Connection) attach
style. The primary electrical interface is an array of solder balls attached to the
substrate opposite the die. The device arrives at the customer with solder balls
attached. This is the packaging technology used for the MCH.
Intel
®
P64H2 Bus Controller Hub. The chipset component that interfaces the PCI-X buses.
T
case
Maximum die temperature allows. This temperature is measured at the geometric
center of the top of the package die.
TDP Thermal Design Power. Thermal solutions should be designed to dissipate this target
power level.

Intel E7500 Specifications

General

Processor Number	E7500
Number of Cores	2
Number of Threads	2
Base Frequency	2.93 GHz
Bus Speed	1066 MHz
TDP	65 W
Socket	LGA775
Core Architecture	Wolfdale
Manufacturing Process	45 nm
Instruction Set	64-bit
Virtualization Technology	Yes
Integrated Graphics	No
Cache	3 MB