Intel MAX 10 FPGA User Manual

Table 8. ADC Features
Feature Description
12-bit resolution • Translates analog signal to digital data for information processing, computing,
data transmission, and control systems
• Provides a 12-bit digital representation of the observed analog signal
Up to 1 MSPS sampling rate Monitors single-ended external inputs with a cumulative sampling rate of 25
kilosamples per second to 1 MSPS in normal mode
Up to 17 single-ended external inputs
for single ADC devices
One dedicated analog and 16 dual function input pins
Up to 18 single-ended external inputs
for dual ADC devices
• One dedicated analog and eight dual-function input pins in each ADC block
• Simultaneous measurement capability for dual ADC devices
On-chip temperature sensor Monitors external temperature data input with a sampling rate of up to 50
kilosamples per second
1.9 User Flash Memory
The user flash memory (UFM) block in MAX 10 devices stores non-volatile information.
UFM provides an ideal storage solution that you can access using Avalon Memory-
Mapped (Avalon-MM) slave interface protocol.
Table 9. UFM Features
Features Capacity
Endurance Counts to at least 10,000 program/erase cycles
Data retention • 20 years at 85 ºC
• 10 years at 100 ºC
Operating frequency Maximum 116 MHz for parallel interface and 7.25 MHz for
serial interface
Data length Stores data up to 32 bits length in parallel
1.10 Embedded Multipliers and Digital Signal Processing Support
MAX 10 devices support up to 144 embedded multiplier blocks. Each block supports
one individual 18 × 18-bit multiplier or two individual 9 × 9-bit multipliers.
With the combination of on-chip resources and external interfaces in MAX 10 devices,
you can build DSP systems with high performance, low system cost, and low power
consumption.
You can use the MAX 10 device on its own or as a DSP device co-processor to improve
price-to-performance ratios of DSP systems.
You can control the operation of the embedded multiplier blocks using the following
options:
• Parameterize the relevant IP cores with the Quartus Prime parameter editor
• Infer the multipliers directly with VHDL or Verilog HDL
System design features provided for MAX 10 devices:
1 MAX
®
10 FPGA Device Overview
MAX 10 FPGA Device Overview
10

Intel MAX 10 FPGA Specifications

General

Brand	Intel
Model	MAX 10 FPGA
Category	Motherboard
Language	English