well as the type of zero search to perform when a FastMac command is
received.
Bits 7..0 define the zero search mode the motor should start up in. If this
value is zero, the motor will not perform a zero search at startup, but will
start up in the mode selected by Reg37, START_MODE. See bits 15..8
below for an exception!
The mode values are identical to Register 2, MODE_REG.
Bits 15..8 define what mode the motor will set when it receives a FastMac
command (96+16). NOTE that if all these bits are non-zero the motor will
start up in passive mode instead of starting in START_MODE!
The mode values are identical to Register 2, MODE_REG.
Bit 16 is set after a zero search has completed, and can thus be used to test
if the motor has performed a zero search at least once after +24V was last
turned on.
After a zero search has completed, the motor will always change into the
mode defined by Reg37, START_MODE (unless an error occurs that will
stop the motor and set ERR_STAT bit(s)).
43 P_REG_P
(not
present)
0-8 /
0
Word /
RW
- When set to 1..8, copies one of POS0..POS7 to P_SOLL, then resets to 0
44 V_REG_P
(not
present)
0-8 /
0
Word /
RW
- When set to 1..8, copies one of VEL0..VEL7 to V_SOLL, then resets to 0
45 A_REG_P
(not
present)
0-4 /
0
Word /
RW
- When set to 1..4, copies one of ACC0..ACC3 to A_SOLL, then resets to 0
46 T_REG_P
(not
present)
0-4 /
0
Word /
RW
- When set to 1..4, copies one of TQ0..TQ3 to T_SOLL, then resets to 0
47 L_REG_P
(not
present)
0-4 /
0
Word /
RW
- When set to 1..4, copies one of LOAD0..LOAD3 to KVOUT then resets to 0
48 Z_REG_P
(not
present)
0-4 /
0
Word /
RW
- When set to 1..4, copies one of ZERO0..ZERO3 to INPOSWIN, then resets
to 0