JVL MAC050 - Page 435

JVL A/S - User Manual - Integrated Servo Motors MAC050 - 4500 431
6.12 Registers
Only MAC400 to 4500
T151 -02GB3
Reg.
Nr.
Firmware /
MacRegIo Name
MacTalk
Name
Size /
Access
Description
106 MAC00_1 /
Digital Inputs
(continued from last
page)
I/O
management
Na /
0
Word /
RW
- To use ANINP2 as a signal conditioned input, use a similar trick so
IOSETUP is set to make ANINP reflect the signal conditioned value
of ANINP2 in bit 8.
Bits 6, 7: Can be configured using CAPCOM5 and CAPCOM& to
reflect the logical result of a register comparison – except for the
MAC00-B42 module, where these simply are inputs 7 and 8.
Bits 5…0: The digital inputs from the B41 an B42 modules.
Bit 11 is unused at this time.
107 MAC00_2
Module status bits
(not present)
Na /
0
Word /
RW
- Shows various status bits for the currently mounted Gen2 module.
For the MAC00-B41 and –B42:
Bit1: Digital Output overload. This shows the status of the output
driver chip that controls the six or eight digital outputs. The overload
status can be set if either an overcurrent condition or a too high
temperature is detected. This status bit is not automatically cleared
when these conditions are no longer present, but requires a supply
voltage off/on cycle.
Bit 0: CVO voltage detected. This bit reflects if the voltage at the
CVO terminal is above a hardwired default value. CVO is the supply
voltage for the digital outputs.
108 MAC00_3
(not present)
Na /
0
Word /
RW
-N/U
109 MAC00_4
(not present)
Na /
0
Word /
RW
-N/U
110 MAC00_5
(not present)
Na /
0
Word /
RW
-N/U
111 MAC00_6
(not present)
Na /
0
Word /
RW
-N/U
112 MAC00_7 /
Counter for external
encoder input
(not present)
Na /
0
Word /
RW
- Counts the number of pulses received from an external encoder,
usually in Pulse In mode, but also possible to use with special
switchboard setup. Can be preset at any time.
113 MAC00_8 /
B41_DO /
Digital outputs
I/O
management
Na /
0
Word /
RW
- Bits [5:0] of this register controls the digital outputs O6..O1 on the
MAC00-B41 module. Each bit that is set here will enable the
corresponding PNP output.
It is possible to overwrite these bits by using Registers 115-120, see
below.
Also Reg215, IO_POLARITY, will invert the value of these bits before
there are written to the hardware.
114 MAC00_9 /
B41_DOSTATUS
I/O
management
Na /
0
Word /
RW
- Shows the status of each of the six digital outputs actually written to
the hardware.
This value will be Reg113, possibly modified by Regs115-120 and
finally possibly having some bits inverted by Reg215.
115 MAC00_10 /
B41_CONF0
(not present)
Na /
0
Word /
RW
- Controls on MAC00-B41 (bit 0 in B41_DO). IO1
Each of the B41_CONF5..CONF0 registers can be used to modify
the corresponding digital outputs by effectively overwriting bits [5:0]
in Reg113, B41_DO.
They can be set to replace the corresponding bit in B41_DO with any
bit from any motor register in the range 1..254, typically status bits
from Reg35, ERR_STAT, for instance bits INPOS or ANY_ERR.
Bits [31:24]: reserved
Bits [23:16]: Source register number, 1..254.
Bits [15:5]: Reserved
Bits [4:0]: Bit number in source register to use.
Reg215, IO_POLARITY, will be applied after these registers to allow
general inversion of each digital output bit.