MPX G2 Service Manual
5-22
(This is an example where the MIDI Input didn't receive any data.)
Test #10 A:0002
<S:00FF R:0000
To exit, press the OPTIONS button and the previous selection will be displayed.
DRAM Failure (11)
When the DRAM Test fails, Address, Data Sent and Data Received fields are used. All of these fields will
display the information in hex.
This information will point to which DRAM is at fault (U79-83 1MEGX4). Each DRAM has 4 bits of data for a
total of 20 bits.
When Test Result is selected, the display will read the following:
Last Test: Failed
<> *1 times
* This assumes that the test was run 1 time.
Pressing the >YES button again will display the following if the DRAM Test failed:
(This is an example of a DRAM failure where D2 (LD2) is bad on U83.)
Detailed ─────┬─ 55 Test A:40000
Information └─ S:55555 R:55551
55 Test = Type of Test (55,AA, Address. Refer to section 2.11 for details)
A: = The Address (in Hex) at the time of the failure.
S: = The Data sent (in Hex)
R: = The Data received (in Hex)
Each Hex value contains 4 bits of binary. 4 bits of binary is called a nibble.
To determine which bit is at fault, the hex values must be converted to binary as follows:
The data sent and
data received values
Hex Binary in this nibble are
Data Sent 55555=0101 0101 0101 0101 0101 different.
Data Received 55551=0101 0101 0101 0101 0001
MSB LSB
Bit 2
Bit 2 was bad because the data sent for bit 2 was 1 but the data received for bit 2 was 0.
Therefore, if the Data Received of the right most hex value is different than the Data Sent of the right most
hex value, U83 or its associated circuitry is the suspect.
The following are examples of failures if the Address Test failed when testing the DRAMs:
LABUS0 shorted to ground- Add Test A:00000
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