LG MCD112 - U1739 Ej2 V1 Ud00;Kf2_E

3-18
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
7. U1739EJ2V1UD00/KF2_E
Port 0 P00 to P06
7
Port 1 P10 to P17
8
Port 2 P20 to P27
7
Port 3 P30 to P33
4
Port 4 P40 to P47
8
Port 5 P50 to P57
8
Port 6 P60 to P678
Port 7 P70 to P778
Port 12 P120 to P124
5
Port 13 P130
Port 14 P140 to P145
6
8
4
2
Key return
Reset control
On-chip debug
Note 2
Multiplier &
divider
System
control
Voltage
regulator
REGC
XT2/EXCLKS/P124
XT1/P123
XT1/P121
RESET
OCD0A
Note 2
/X1, OCD1A
Note 2
/P31
KR0/P70 to
KR7/P77
OCD0B
Note 2
/X2, OCD1B
Note 2
/P32
X2/EXCLK/P122
Internal high-speed
oscillator
8
Buzzer output
BUZ/P141
Clock output
control
Power on clear/
low voltage
indicator
POC/LVI
control
PCL/P140
EXLVI/P120
VDD,
EVDD
VSS,
EVSS
FLMD0
16-bit timer/
event counter 00
TO00/TI010/P01
TO01/TI011/P06
TI000/P00
TI001/P05
TOH0/P15
TOH1/P16
TI50/TO50/P17
TI51/TO51/P33
RxD0/P11
TxD0/P10
RxD6/P14
TxD6/P13
SI10/P11
SO10/P12
SI11/P03
SO11/P02
SCK11/P04
SCK11/P05
SIA0/P143
SOA0/P144
SCKA0/P142
STB0/P145
BUSY0/P141
EXSCL0/P62
SDA0/P61
SCL0/P60
AV
REF
RxD6/P14 (LINSEL)
INTP0/P120
INTP1/P30 to
INTP4/P33
INTP5/P16
INTP6/P140,
INTP7/P141
AV
SS
ANI0/P20 to
ANI7/P27
SCK10/P10
RxD6/P14 (LINSEL)
16-bit timer/
event counter 01
8-bit timer H0
8-bit timer H1
Watchdog timer
78K/0
CPU
core
Internal
high-speed
RAM
Internal
expansion
RAM
Flash
memory
BANK
Note 1
Watch timer
8-bit timer
event counter 50
8-bit timer
event counter 51
Serial
interface UART0
LINSEL
Serial
interface UART6
Serial
interface CSI10
Serial
interface CSI11
Serial
interface CSIA0
Serial
interface IIC0
A/D converter
Interrupt
control
Internal low-speed
oscillator