4-10 Hardware Principle
Figure4-10 Diagram of System Power-on Supported Circuit
Related controlling signal comment:
The pulse generated by the power button on the
control panel is sent to CPU module through
power management FPGA, to power on the
system.
CPU module output effectively represents that
CPU system has been in the standby status,
when 5VSTB which is controlled by power
management FPGA is in the charging status.
CPU module output effectively represents that
CPU system has been in the dormancy status.
The output of power supply module is
transmitted to the CPU module by power
management FPGA, which represents the +12V
output of power module, has been powered on.
Power management FPGA is transmitted to
CPU, which notifies CPU module power on or
power off.
The output of power management FPGA is
transmitted to the power module, which is used
to control other power of the power supply
module except 5VSTB and 3V3STB to be
power-on.
The output of power management FPGA
notifies power to provide 5V standby power.
The 12V power has been provided steadily.
The 5VSTB power has been provided steadily.
When battery and AC supply, the power supply module always maintains the
3V3STB output, and supports power management FPGA of the power supply
module to be standby status.
When powered by AC, the AC indicator is green, no matter the system is on, the
system could output 5VSTB though DC-DC power board controlled by
PWR_5VSTB_EN. The PWR_5VSTB_EN signal controlled by power managing
FPGA of the power supply module.
However, when powered by battery, the power management FPGA of the power
supply module could provide PWR_5VSTB_EN signal according to battery-present
status if only users turn on the system via power button of the control panel. Then,
the system could output 5VSTB though DC-DC power board controlled by
PWR_5VSTB_EN.
The detailed flow of power-on is shown as follows:
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