Mindray DC-32 - Page 65

Hardware Principle 4-11
Pressing power switch
(Control panel)
Is AC in place?
(Power management
FPGA)
NO
Receiving PWR_BTN_N effect
(Power management FPGA)
PWR_5VSTB_EN is valid
(Power management
FPGA)
5VSTB start-up
(Power supply module)
PWR_5VSTB_OK_N is
valid (Power supply
module)
CPU_PWR_BTN_N is valid
(Power management FPGA)
S3_N and S4_N is invalid
( CPU module)
PWR_12V_EN is valid
(Power management
FPGA)
PWR_12V_OK_N is valid
(Power supply modulel)
CPU start-up
(CPU module)
12V and +5V start-up
(DC-DC power board)
PWR_OK_N is valid
(Power management
FPGA)
YES
Indicating 12V
output of Power
supply module of
is normal
Indicating
5VSTB_CPU
output of Power
supply module is
normal
CPU_PWR_BTN_N is valid
(Power management
FPGA)
S3_N and S4_N are invalid
(CPU board)
Figure 4-11 System Power-on