OVERVIEW: Digital Section
1.6.1 Zeus Processor
Zeus is a dual core (P2002 Starcore DSP and an ARM-11 Application Processor) processor with a
shared memory system
(see Figure 1-9).
The following is a summary of the ZEUS key features:
The following is a list of ARM11 core features in the ARM1136JF-S AP subsystem:
• Integer unit with integral Embedded ICE logic
• Eight-stage pipeline
• Branch prediction with return stack
• Low-interrupt latency
• Instruction and data Memory Management Units (MMUs), using MicroTLB structures backed by a
unified main TLB
• Instruction and data L1 caches, including a non-blocking data cache with hit-under-miss
• Virtually-indexed/physically-addressed L1 caches
• 64-bit interface to both L1 caches
• Write buffer (by-passable)
• High-Speed Advanced Micro Bus Architecture (AM1BA) L2 interface
• Vector Floating Point co-processor (VFP) hardware for acceleration of 3-D graphics and other
floating-point applications.
Figure 1-9. Zeus Functional Block Diagram
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