National Instruments 60 Series Programmer's Manual

Chapter 2 Theory of Operation
PCI E Series RLPM 2-4
© National Instruments Corporation
Figure 2-4. PCI-6032E and PCI-6033E Block Diagram
IRQ
DMA
PCI Bus
EEPROM
Address/Data
Control
Analog
Input
Control
EEPROM
Control
DMA
Interface
MIO
Interface
DAQ-STC
Bus
Interface
Analog
Output
Control
I/O
Bus
Interface
MITE
Generic
Bus
Interface
PCI
Bus
Interface
Address (5)
Timing
PFI / Trigger
I/O Connector
3
RTSI Bus
Digital I/O (8)
16-Bit
Sampling
A/D
Converter
Configuration
Memory
+
NI-PGIA
Gain
Amplifier
–
Calibration
Mux
Mux Mode
Selection
Switches
Analog
Muxes
Voltage
REF
Calibration
DACs
Trigger
Analog
Trigger
Circuitry
2
Trigger Level
DACs
DAQ - STC
Analog Input
Timing/Control
Analog Output
Timing/Control
Digital I/O
Trigger
Counter/
Timing I/O
RTSI Bus
Interface
DMA/
Interrupt
Request
Bus
Interface
(8)*
(8)*
AI Control
Data (16)
ADC
FIFO
* (32) for the PCI-6033E
2

National Instruments 60 Series Specifications

General

Brand	National Instruments
Model	60 Series
Category	I/O Systems
Language	English