X Series User Manual
© National Instruments | I-11
I/O protection, 7-6
programmable power-up states, 7-6
using terminals as static digital I/Os, 7-3
using terminals as timing input signals,
7-2
PFI terminals as static digital I/Os, 7-3
pin assignments. See pinouts
pinouts
counter default, 8-42
device, 1-10
NI PCIe/PXIe-6341, A-4
NI PCIe/PXIe-6361, A-21
NI PCIe/PXIe-6363, A-27
NI PCIe-6320, A-2
NI PCIe-6321, A-4
NI PCIe-6323/6343, A-8
NI PCIe-6351/6361, A-21, A-22, A-23,
A-28
NI PCIe-6353/6363, A-27
NI PCIe-6374, A-44
NI PCIe-6376, A-33
NI PXIe-6345/6355, A-12, A-14, A-18
NI PXIe-6356/6366/6376, A-33
NI PXIe-6358/6368/6378, A-39
NI PXIe-6365, A-41
NI PXIe-6375, A-46
NI USB-6343, A-9
NI USB-6351/6361, A-22, A-23, A-28
NI USB-6356/6366, A-36
NI USB-6363 USB, A-31
RTSI connector, 3-7, 9-5
pins, default, 8-42
position measurement, 8-21
buffered, 8-23
power
+5 V, 3-5
connector, PCI Express disk drive, 3-6
power-up states, 6-18, 7-6
prescaling, 8-46
programmable
function interface (PFI), 7-1
power-up states, 6-18, 7-6
programmed I/O, 10-2
programming devices in software, 2-10
pulse
encoders, 8-23
generation for ETS, 8-35
train generation, 8-28
continuous, 8-30
pulse-width measurement
implicit buffered, 8-6
single, 8-6
PXI
and PXI Express, 10-3
clock, 10-3
clock and trigger signals, 9-7
trigger signals, 10-3
triggers, 9-8
PXI Express
and PXI, 10-3
chassis compatibility, 10-3
clock, 10-3
clock and trigger signals, 9-7
considerations, 10-3
PXIe_CLK100, 9-7
PXIe_SYNC100, 9-7
PXI_CLK10, 9-8
PXI_STAR
filters, 9-8
trigger, 9-8
PXIe_CLK100, 9-7
PXIe_SYNC100, 9-7
Q
quadrature encoders, 8-21
R
range, analog input
MIO X Series devices, 4-2
real-time system integration bus, 9-4
reciprocal frequency measurement, 8-13
reference clock
10 MHz, 9-3
external, 9-2
referenced single-ended connections
using with floating signal sources
MIO X Series devices, 4-17
when to use with floating signal sources
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