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Nexcom PEAK650VL2B - Page 31

Nexcom PEAK650VL2B
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Peak 650 User's Guide Rev. A October 2000
BIOS Setup
4-15
Delayed Transaction
The chipset has an embedded 32-bit posted write buffer to support delay transactions cycles. Select
Enabled to support compliance with PCI specification version 2.1.
The Choice: Enabled, Disabled
AGP Graphics Aperture Size
This field determines the effective size of the Graphic Aperture used for a particular GMCH configuration.
It can be updated by the GMCH-specific BIOS configuration sequence before the PCI standard bus
enumeration sequence takes place. If it is not updated then a default value will select an aperture of
maximum size.
The choice: 4, 8, 16, 32, 64, 128, 256
Display Cache Frequency
You can use this item to select the frequency of the display cache.
The Choice: 100MHZ, 133MHZ.
System Memory Frequency
You can use this item to select the operating frequency for the main system memory.
The Choice: Auto, 100MHZ, 133MHZ.
On-Chip Video Window Size
Select the on-chip video window size for VGA drives use.
The Choice: 32MB, 64MB, Disabled.
Onboard Display Cache Setting
Setting the onboard display cache timing.
CAS # Latency
Select the local memory clock periods.
The Choice: 2, 3
Paging Mode Control
Select the paging mode control.
The Choice: Close, Open.
RAS-to-CAS Override
Select the display cache clock periods control.
The Choice: Fast, Slow.

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