Nexcom PEAK650VL2B - Page 52

Peak 650 User's Guide Rev. A October 2000
BIOS Setup
4-36
POST (hex) Description
for ESCD & DMI support.
11h Reserved
12h Use walking 1 algorithm to check out interface in CMOS circuitry. Also set real-time
clock power status, and then check for override.
13h Reserved
14h Program chipset default values into chipset. Chipset default values are MODBINable by
OEM customers.
15h Reserved
16h Initial Early_Init_Onboard_Generator switch.
17h Reserved
18h Detect CPU information including brand, SMI type (Cyrix or Intel) and CPU level (586 or
686).
19h Reserved
1Ah Reserved
1Bh Initial interrupts vector table. If no special specified, all H/W interrupts are directed to
SPURIOUS_INT_HDLR & S/W interrupts to SPURIOUS_soft_HDLR.
1Ch Reserved
1Dh Initial EARLY_PM_INIT switch.
1Eh Reserved
1Fh Load keyboard matrix (notebook platform).
20h Reserved
21h HPM initialization (notebook platform).
22h Reserved
23h 1. Check validity of RTC value:
e.g. a value of 5Ah is an invalid value for RTC minute.
2. Load CMOS settings into BIOS stack. If CMOS checksum fails, use default value
instead.
3. Prepare BIOS resource map for PCI & PnP use. If ESCD is valid, take into consideration
of the ESCD legacy information.
4. Onboard clock generator initialization. Disable respective clock resource to empty PCI
& DIMM slots.
5. Early PCI initialization:
-Enumerate PCI bus number
-Assign memory & I/O resource
-Search for a valid VGA device & VGA BIOS, and put it into C000h:0.