Appendices
A-36
CJ-series EtherNet/IP Units Operation Manual for NJ-series CPU Unit (W495)
CIO n+18 12 *_RegTargetSta[44] Registered Target Node Table Bit for Node Address
44
13 *_RegTargetSta[45] Registered Target Node Table Bit for Node Address
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14 *_RegTargetSta[46] Registered Target Node Table Bit for Node Address
46
15 *_RegTargetSta[47] Registered Target Node Table Bit for Node Address
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CIO n+19 0 *_RegTargetSta[48] Registered Target Node Table Bit for Node Address
48
1 *_RegTargetSta[49] Registered Target Node Table Bit for Node Address
49
2 *_RegTargetSta[50] Registered Target Node Table Bit for Node Address
50
3 *_RegTargetSta[51] Registered Target Node Table Bit for Node Address
51
4 *_RegTargetSta[52] Registered Target Node Table Bit for Node Address
52
5 *_RegTargetSta[53] Registered Target Node Table Bit for Node Address
53
6 *_RegTargetSta[54] Registered Target Node Table Bit for Node Address
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7 *_RegTargetSta[55] Registered Target Node Table Bit for Node Address
55
8 *_RegTargetSta[56] Registered Target Node Table Bit for Node Address
56
9 *_RegTargetSta[57] Registered Target Node Table Bit for Node Address
57
10 *_RegTargetSta[58] Registered Target Node Table Bit for Node Address
58
11 *_RegTargetSta[59] Registered Target Node Table Bit for Node Address
59
12 *_RegTargetSta[60] Registered Target Node Table Bit for Node Address
60
13 *_RegTargetSta[61] Registered Target Node Table Bit for Node Address
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14 *_RegTargetSta[62] Registered Target Node Table Bit for Node Address
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15 *_RegTargetSta[63] Registered Target Node Table Bit for Node Address
63
I/O memory location in CJ-
series CPU Unit
Device variable for the CJ-series Unit in NJ-series CPU Unit
Word address Bit numbers Variable name Description
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