Panasonic DMR-EZ28P

11.2. Analog Video Block Diagram
Q7801
BUFFER16
DIGITAL/ANALOG TUNER
TU7801
VIDEO OUT
DMR-EZ28P/PC
Analog Video Block Diagram
:PB SIGNAL:REC SIGNAL
I2C5CK
I2C5DT
G TU V OUT A
58
54
50
46
42
62
64
P7401
P7401P55201
P55201
L123 SWIDE
BLOCK SECTION
TO DIGITAL
34
P7401
V YIN DM
38
P55201
P55201
P7401
CPNCIN DM
RPC R OUT
BPC B OUT
GPC Y OUT
CPN Y OUT
CPS V OUT
CPN C OUT
C/S DET
CPN Y IN
CPN C IN
LINE V IN
(480P/480I)
VIDEO OUT
COMPONENT
JK3003
19IC7501-
(RED)
PR/CR
(BLUE)
PB/CB
Y(GREEN)
2
3
4
VIDEO OUT
JACK
A/V OUT
JK3001
10
9
13
OUT
S-VIDEO
C
Y
Y
C
C
Y
FRONT S IN L
FRONT Y IN
FRONT C IN
FRONT V IN
VIDEO IN 2
4
IN
S-VIDEO
6
3
FRONT A/V IN JACK
JK3002
FRONT S-VIDEO IN JACK
JK3004
4
IN
S-VIDEO
6
3
14
VIDEO IN
JACK
A/V IN
JK3001
FROM DIGITAL
BLOCK SECTION
FROM/TO DIGITAL
BLOCK SECTION
P7401P55201
P55201 P7401
P7401P55201
P7401P55201
P7401P55201
RPROUT DM
BPYOUT DM
GPYOUT DM
YOUT DM
COUT DM
D L3 OUT
D L2 OUT
D L1 OUT
79
77
Y
V
INTERFACE
IIC BUS
V-SW
Y-SW
C-SW
Y-SW
C-SW
V-SW
CLAMP
CLAMP
CLAMP
CLAMP
CLAMP
IIC DATA
IIC CLOCK
8
C1 S1/S2 DET.
4
C2 S1/S2 DET.
V/Y TO DVD
C TO DVD
DVD S1/S2 OUT
6
TUNER V IN
Y1 IN
C2 IN
C1 IN
Y2 IN
S2 DET.IN
S1 DET.IN
BIAS
S1/S2
V2 IN
V/Y SW
PY-SW
PB-SW
PR-SW
V1 IN
PY IN
PB IN
PR IN
YIN
CIN
51
49
5
7
9
11
13
15
22
23
CLAMP LPF
S1/S2
BIAS
LPF
LPF
LPF
LPF
Bias
CL
Bias
CL
Bias
CL
+
40
45
43
29
32
30
28
Y2 OUT
C2 OUT
V2 OUT
PY OUT
41
38
36
34
35
16
52
39
PB OUT
PR OUT
75Ω
75Ω
75Ω
75Ω
75Ω
75Ω
17
VCC
55
50
37
27
(VIDEO PROCESSOR)
IC3001
DMR-EZ28P / DMR -EZ28 PC
37