Low Voltage Differential Signaling
e
es
n offset of 1.25V. Integrated circuits based on
VDS technology distribute signals with low-jitter, while creating little noise.
peak-
oltage level is reduced as well. The lower voltage level reduces the power
onsumption and the generated noise from data transmission. Another benefit of the
The method used to transfer the video information from the Main circuit board to th
LCD drive circuit is called Low Voltage Differential Signaling (LVDS). LVDS devices
typically consume less power than other signaling systems such as TTL. LVDS devic
use a constant current driver. Therefore, power consumption is independent of
frequency. The LVDS interface voltage is much less than TTL, approximately 2V. The
voltage swing is typically 350mV with a
L
In this application, three 8-bit streams of data are converted from parallel to serial and
interleaved. The interleave process makes the data less susceptible to noise. The
to-peak v
c
LVDS standard is minimal concern for cable length. The data rates for LVDS are 110
Mbps for a 1-meter distance, dropping to 90 Mbps over a 10-meter distance.
Figure 27
30
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