Philips 32PFL4606H/60 - Page 40

IC Data Sheets
EN 40 TPM7.1E LA8.
2011-Aug-19
Figure 8-3 Pin configuration [2/2]
19090_302_110423.eps
110524
Pinning information
MT5395LUGJ
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 RT
AO2P AOCKP AO3P AO4P
TXPA_E
PI
TXP0_V
B1
TXP1_V
B1
TXP2_V
B1
TXP3_V
B1
TXPB_E
PI
BE0P BE1P BE2P BECKP BE3P BE4P
A
AO2N AOCKN AO3N AO4N
TXNA_E
PI
TXN0_V
B1
TXN1_V
B1
TXN2_V
B1
TXN3_V
B1
TXNB_E
PI
BE0N BE1N BE2N BECKN BE3N BE4N
B
AE2N AE3N HTPDN BO0N BO2N BO3N GPIO21 GPIO19 GPIO23 GPIO22
C
AE2P AE3P LOCKN BO0P BO2P BO3P GPIO20 GPIO18
LDM_D
O
GPIO16
D
AECKN AECKP AE4N AE4P
AVDD1
2_VPLL
BO1N BO1P BOCKP BOCKN BO4N BO4P GPIO15 GPIO17
LDM_C
LK
LDM_
C
S
E
AVDD3
3_LVDS
A
AVSS12
_VB1A
AVSS12
_VPLL
REXT_V
B1
AVDD1
2_VB1A
AVDD3
3_LVDS
B
DVSS
FSRC_
WR
LDM_DI SOE
LDM_V
SYNC
F
AVSS12
_VB1B
AVDD1
2_VB1B
GCLK6
VGH_O
DD
POL
G
H
GCLK3
VGH_E
VEN
VST
J
GCLK4 GCLK5 GPIO13 FLK GCLK1
K
VCC3IO VCC3IO DVSS GPIO14 GPIO12 SD_D2 SD_D3 GCLK2
L
AVSS33
_LVDSA
DVSS
AVSS33
_LVDSB
VCC3IO VCC3IO DPM SD_D1
M
DVSS DVSS DVSS DVSS VCCK VCC3IO GPIO9 GPIO10 GPIO11 SD_CLK
SD_CM
D
SD_D0
N
DVSS DVSS DVSS DVSS VCCK
SPI_C
L
E
CI_INT
SPI_C
L
K1
SPI_C
L
K
SPI_D
A
TA
P
DVSS DVSS DVSS DVSS DVSS DVSS DVSS
PVR_TS
SYNC
PVR_TS
CLK
PVR_TS
DATA0
PVR_TS
DATA1
R
DVSS DVSS DVSS VCCK VCCK
CI_TSV
AL
PVR_TS
VAL
CI_TSD
ATA0
T
DVSS DVSS DVSS DVSS DVSS VCCK
CI_TSS
YNC
CI_TSC
LK
DEMOD
_TSDAT
A0
DEMOD
_RST
DEMOD
_TSCLK
U
DVSS DVSS DVSS DVSS DVSS
AVSS33
_LD
ALIN
AOSDA
TA0
AOSDA
TA1
DEMOD
_TSVAL
DEMOD
_TSSYN
C
TUNER
_DATA
TUNER
_CLK
V
DVSS DVSS DVSS DVSS DVSS
AVSS33
_REC
AVSS12
_COM
RF_AGC IF_AGC
W
DVSS DVSS DVSS VCCK VCCK
AVSS33
_DAC1
AOSDA
TA4
AOSDA
TA3
AOSDA
TA2
AOLRC
K
AOBCK
AOMCL
K
Y
VCCK DVSS VCCK DVSS DVSS
AVSS33
_DAC
OPWM0 OPWM2
PHYLED
1
OSDA0 OSCL0 ASPDIF REXT
AA
VCCK VCCK VCCK DVSS DVSS
AVSS33
_AADC
PHYLED
0
OSDA1 OSCL1
AB
AVSS12
_RGB
AVSS33
_VDAC
AVSS12
_PLL
AVSS33
_CVBS
AVDD3
3_COM
AVDD3
3_REC
AVDD3
3_LD
U1TX U1RX OPWM1
AC
DVSS GPIO7 GPIO8
AVDD1
2_COM
TXVN_1 TXVP_1
AD
DVSS DVSS DVSS
AVDD1
2_REC
TXVN_0 TXVP_0
AE
ADIN2_
SRV
ADIN3_
SRV
ADIN5_
SRV
MPXP
AVSS33
_DEMO
D
AVDD3
3_IFPG
A
DVSS DVSS DVSS DVSS
AVSS12
_REC
AVDD3
3_DAC1
TANA_0 TANA_1
AF
ADIN0_
SRV
AVDD1
2_PLL
MPXN
AVSS33
_XTAL
DVSS DVSS
AVSS33
_COM
AR2_A
DAC
AL2_AD
AC
AR1_
A
DAC
AL1_AD
AC
AG
ADIN4_
SRV
AVDD3
3_VDAC
AVDD3
3_CVBS
AVSS12
_DEMO
D
VMID_
AADC
DVSS DVSS DVSS
AL3_AD
AC
AH
COM1 PR1P
VDAC_
OUT1
BYPASS
1
BYPASS
0
CVBS1P
AVDD3
3_DEM
OD
LOUTN LOUTP
AIN4_R
_AADC
AVDD3
3_DAC
AVDD3
3_AAD
C
AR3_A
DAC
AL0_AD
AC
AR0_A
DAC
AJ
PB1P
AVDD1
2_RGB
PR0P
VDAC_
OUT2
SC0 CVBS2P
CVBS_C
OM
CVBS0P
AVDD1
2_DEM
OD
AVDD3
3_XTAL
_STB
AIN1_L
_AADC
AIN3_R
_AADC
AIN1_R
_AADC
DVSS DVSS DVSS
AK
SOY0 COM0
FS_VDA
C
SC1
ADCIN
N_DEM
OD
XTALO
AIN3_L
_AADC
AIN5_L
_AADC
AIN2_L
_AADC
AIN5_R
_AADC
AIN2_R
_AADC
AL
Y0P PB0P SY0 SY1
ADCINP
_DEMO
D
XTALI
AIN4_L
_AADC
AIN6_L
_AADC
AIN0_L
_AADC
AIN6_R
_AADC
AIN0_R
_AADC
AM
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 RB