Philips 32PFL4606H/60 - Pinning Information

IC Data Sheets
EN 39TPM7.1E LA 8.
2011-Aug-19
Figure 8-2 Pin configuration [1/2]
19090_301_110423.eps
110524
Pinning information
LT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
A
BRA3 BRA2 BRA9 BRA12 BRBA1 BRCKE BRCLK0
BRDQS
1#
BRDQS
0#
BRDQ1
1
DVSS AO0P AO1P
B
BRBA0 BRA5 BRA7 BRA11 BRA4 BRA10
BRCLK0
#
BRDQS
1
BRDQS
0
BRDQ9 DVSS AO0N AO1N
C
BRODT BRCS# RVREF BRA13 BRA6 BRA1 BRBA2 BRDQ8
BRDQ1
4
BRDQ1
2
BRDQM
0
BRDQM
1
BRDQ1
3
DVSS AE0N
D
RVREF DVSS
REXTD
N
VCC2IO BRA8 BRA0 BRWE#
BRDQ1
0
BRDQ7 BRDQ3 BRDQ1
BRDQ1
5
DVSS AE0P
E
ARDQ2
2
ARDQ2
0
VCC2IO
BRRESE
T
BRCAS
#
BRRAS
#
BRDQ5 VCC2IO BRDQ0 BRDQ6 BRDQ4 DVSS AE1N AE1P
F
ARDQM
3
ARDQ1
6
ARDQ1
8
VCC2IO VCC2IO DVSS DVSS BRDQ2 DVSS
G
ARDQS
2#
ARDQS
2
ARDQM
2
ARDQ2
9
ARDQ2
7
VCC2IO DVSS
H
ARDQS
3#
ARDQS
3
VCC2IO DVSS
ARDQ2
5
ARDQ3
1
MEMTN DVSS
J
ARDQ1
9
ARDQ1
7
AVDD1
2_MEM
PLL
MEMTP DVSS
K
ARDQ2
1
ARDQ2
3
DVSS
AVSS12
_MEMP
LL
L
ARCLK1
#
ARCLK1 VCC2IO
ARDQ2
4
ARDQ2
6
ARDQ3
0
ARDQ2
8
DVSS VCCK DVSS VCCK DVSS VCCK
M
ARODT
ARCAS
#
ARCKE DVSS VCCK DVSS VCCK DVSS DVSS
N
ARA13 ARA3 ARA0 DVSS ARWE# ARA10 VCCK VCCK DVSS DVSS DVSS DVSS
P
ARA9
ARRESE
T
ARA7 ARA2 ARBA1 ARA12 VCCK VCCK DVSS DVSS DVSS DVSS
R
ARA5 ARBA0 ARA11 DVSS DVSS DVSS DVSS DVSS DVSS
T
ARCS#
ARRAS
#
ARBA2 DVSS ARA8 ARA6 VCCK DVSS DVSS DVSS DVSS DVSS
U
ARDQ4 ARDQ6 VCC2IO ARA4 ARA1 RVREF DVSS DVSS DVSS DVSS DVSS DVSS
V
ARDQ2 ARDQ0 VCCK VCCK DVSS DVSS DVSS DVSS
W
ARDQM
1
VCC2IO DVSS
ARDQ1
3
DVSS DVSS DVSS DVSS DVSS DVSS
Y
ARDQS
0#
ARDQS
0
ARDQM
0
ARDQ1
1
ARDQ1
5
VCCK VCCK DVSS DVSS DVSS DVSS
AA
ARDQ1
2
ARDQ1
4
ARDQ9 VCCK VCCK DVSS DVSS VCCK DVSS
AB
ARDQS
1#
ARDQS
1
ARDQ1 DVSS
ARDQ1
0
ARDQ8 DVSS DVSS VCCK DVSS VCCK DVSS
AC
ARDQ3 ARDQ7 ARDQ5 VCC2IO
AVSS33
_USB_2
P
AVSS33
_HDMI
AVSS33
_VGA_S
TB
AD
DVSS DVSS DVSS
AE
ARCLK0
#
ARCLK0 VCC2IO VCC3IO VCC3IO
OPCTR
L
0
AF
VCC2IO VCC2IO VCC2IO DVSS VCC3IO VCC3IO
OPCTRL
6
OPWRS
B
VGA_S
CL
DVSS
AG
VCCK VCCK VCCK VCCK VCCK
AVDD3
3_HDM
I
PWR5V
OPCTRL
1
OIRI
VGA_S
DA
ADIN1_
SRV
AH
JTDO JTCK JTMS JTDI
AVDD3
3_USB_
2P
GPIO3
USB_2P
_VRT
GPIO4
OPCTRL
3
ORESE
T#
U0TX
AVDD1
0_LDO
AJ
JTRST# POWE# PDD5 GPIO1 GPIO6
HDMI_
SCL
HDMI_
CEC
OPCTR
L
2
OPCTRL
5
U0RX
AK
PAALE PACLE POOE# PDD4 PDD6 GPIO0 GPIO2 GPIO5
HDMI_
SDA
HDMI_
HPD
AVDD1
2_HDM
I
OPCTRL
4
BP SOG GP
AVDD3
3_VGA_
STB
AL
POCE0
#
PDD0 PDD2 PDD7
USB_2P
_DP1
USB_2P
_DP0
RX_C RX_0 RX_1 RX_2 HSYNC COM SOY1
AM
PARB# PDD1 PDD3
POCE1
#
USB_2P
_DM1
USB_2P
_DM0
RX_CB RX_0B RX_1B RX_2B VSYNC RP Y1P
LB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
MT5395LUGJ