Philips CD-I - Page 99

4) Interrupt handling to CPU68070
The external interrupt register 1 in the system cintro
register of the CPU 68070 should be set before
interrupt is asserted.
For the interruption, the INTEXl- and the IACKEXl- are
used.
1.7.4 Pin assignment SCSI interface
Nr. Name
1
2
3
4
5
6
7
8
9
GND
GND
GND
GND
GND
GND
GND
GND
GND
10 GND
11 GND
12 GND
13 GND
14 GND
15 GND
16 GND
17 GND
18 GND
19 GND
20 GND
21 GND
22 GND
23 GND
24 GND
25 GND
I/O
Nr. Name
26 DB0-
27 DBl-
28
DB2-
29 DB3-
30 DB4-
31 DBS-
32 DB6-
33 DB7-
34 DBP-
35 GND
36 GND
37 GND
38 TERMPWR
39 GND
40 GND
41 ATN-
42 GND
43 BSY-
44 ACK-
45 RST-
46
47
48
49
50
7-19
MSG-
SEL-
C/D-
REQ-
I/O-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
I/O
0
I/O
I
I/O
I
I
I
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