5 – Managing Ports
Testing Ports
59097-02 B 5-17
A
5.5
Testing Ports
The port loopback tests verify correct port operation by sending a frame out
through the loop, and then verifying that the frame received matches the frame
that was sent. Only one port can be tested at a time for each type of test. The Port
Loopback Test dialog shown in Figure 5-4 presents the following loopback tests:
Figure 5-4. Port Loopback Test Dialog
SerDes level (Internal) - The SerDes level test verifies port circuitry. The
SerDes level test sends a test frame from the ASIC through the SerDes chip
and back to the ASIC for the selected ports. The port passes the test if the
frame that was sent by the ASIC matches the test frame that was received.
This test requires that the port be in diagnostics mode, and therefore,
disrupts communication.
SFP level (External) - The SFP level test verifies port circuitry. The SFP
level test sends a test frame from the ASIC through the SerDes chip,
through the SFP transceiver fitted with an external loopback plug, and back
to the ASIC for the selected ports. The port passes the test if the test frame
that was sent by the ASIC matches the test frame that was received. This
test requires that the port be in diagnostics mode, and therefore, disrupts
communication.
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