Quectel BG96 - Page 24

LPWA Module Series
BG96 Hardware Design
BG96_Hardware_Design 23 / 79
ANT_MAIN
60
IO
Main antenna
interface
50Ω impedance.
ANT_GNSS
49
AI
GNSS antenna
interface
50Ω impedance.
If unused, keep this
pin open.
Other Interface Pins
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
PSM_IND
1)
1
DO
Power saving
mode indication
V
OL
max=0.45V
V
OH
min=1.35V
1.8V power domain.
If unused, keep this
pin open.
W_DISABLE#
18
DI
Airplane mode
control
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
Pull-up by default.
In low voltage level,
the module will enter
airplane mode.
If unused, keep this
pin open.
AP_READY
19
DI
Application
processor
sleep state
detection
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep this
pin open.
USB_BOOT
75
DI
Force the
module to enter
emergency
download
mode
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep this
pin open.
GPIO26
26
IO
General-
purpose input/
output interface
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep this
pin open.
GPIO64
64
IO
General-
purpose input/
output interface
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep this
pin open.
ADC Interfaces
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment