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Quectel BG96 - Page 34

Quectel BG96
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LPWA Module Series
BG96 Hardware Design
BG96_Hardware_Design 33 / 79
Table 8: RESET_N Pin Description
The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button
can be used to control the RESET_N.
Reset pulse
RESET_N
4.7K
47K
150~460ms
Figure 10: Reference Circuit of RESET_N by Using Driving Circuit
RESET_N
S2
Close to S2
TVS
Figure 11: Reference Circuit of RESET_N by Using Button
Pin Name
Pin No.
Description
DC Characteristics
Comment
RESET_N
17
Reset the module
Vnorm=1.8V
V
IL
max=0.5V

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