Quectel EG06 Series User Manual

LTE-A Module Series
EG06 Hardware Design
EG06_Hardware_Design 26 / 89
V
IH
max=2.0V
PCM_CLK
67
IO
PCM clock
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
In master mode, it is
an output signal. In
slave mode, it is an
input signal.
If unused, keep it
open.
I2C_SCL
43
OD
I2C serial clock
Used for external
codec.
1.8V power domain.
An external pull-up
resistor is required.
1.8V only. If unused,
keep it open.
I2C_SDA
42
OD
I2C serial data
Used for external
codec.
1.8V power domain.
An external pull-up
resistor is required.
1.8V only. If unused,
keep it open.
SPI Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
SPI_CS
79
DO
Chip select of SPI
interface
V
OL
max=0.45V
V
OH
min=1.35V
1.8V power domain.
If unused, keep it
open.
SPI_CLK
80
DO
Clock signal of SPI
interface
V
OL
max=0.45V
V
OH
min=1.35V
1.8V power domain.
If unused, keep it
open.
SPI_MOSI
77
DO
Master output
slave input of SPI
interface
V
OL
max=0.45V
V
OH
min=1.35V
1.8V power domain.
If unused, keep it
open.
SPI_MISO
78
DI
Master input
slave output of SPI
interface
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep it
open.
PCIe Interface*
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
PCIE_REF
CLK_P
179
AO
Output PCIe
reference clock -
plus
If unused, keep it
open.
PCIE_REF
CLK_M
180
AO
Output PCIe
reference clock -
minus
If unused, keep it
open.
PCIE_TX_M
182
AO
PCIe transmission
- minus
If unused, keep it
open.

Quectel EG06 Series Specifications

General

Brand	Quectel
Model	EG06 Series
Category	Control Unit
Language	English