Quectel SG368Z Series

Smart Module Series
SG368Z_Series_Hardware_Design 50 / 113
I2C features:
⚫ Support I2C bus master mode
⚫ Support programmable clock frequency by software and the data rate is up to 400 kbps
⚫ Support 7-bit and 10-bit addressing modes
Table 17: Pins Description of I2C Interfaces
4.6. I2S Interfaces
SG368Z-WF supports up to 1 group of I2S interface; SG368Z-AP supports up to 2 groups of I2S
interfaces. 1 of them is configured by default and 1 of them is multiplexed from other interface, see
document [2].
I2S features:
⚫ Bit rate is from 16 bits to 32 bits
⚫ Sampling rate is up to 192 kHz
⚫ Support master or slave mode
⚫ Support I2S, PCM, TDM modes
⚫ Support PCM formats: early, late1, late2, late3
⚫ Support up to TDM 16 channels
⚫ I2S, PCM, TDM modes can not be used simultaneously
Pin Name
Pin No.
I/O
Description
I2C2_SDA
284
OD
I2C2 serial data
I2C2_SCL
287
OD
I2C2 serial clock
I2C3_SDA
268
OD
I2C3 serial data
I2C3_SCL
273
OD
I2C3 serial clock
I2C4_SDA
155
OD
I2C4 serial data
I2C4_SCL
159
OD
I2C4 serial clock
TP_I2C1_SCL
45
OD
TP I2C clock
TP_I2C1_SDA
40
OD
TP I2C data